Motorola ColdFire MCF5281 - Manual (Page 613)

Reset Controller Module
Freescale Semiconductor 29-5
29.5 Functional Description
29.5.1 Reset Sources
Table 29-5 defines the sources of reset and the signals driven by the reset controller.
To protect data integrity, a synchronous reset source is not acted upon by the reset control logic until the
end of the current bus cycle. Reset is then asserted on the next rising edge of the system clock after the
cycle is terminated. Whenever the reset control logic must synchronize reset to the end of the bus cycle,
the internal bus monitor is automatically enabled regardless of the BME bit state in the chip configuration
register (CCR). Then, if the current bus cycle is not terminated normally the bus monitor terminates the
cycle based on the length of time programmed in the BMT field of the CCR.
Internal byte, word, or longword writes are guaranteed to complete without data corruption when a
synchronous reset occurs. External writes, including longword writes to 16-bit ports, are also guaranteed
to complete.
3 POR Power-on reset flag. Indicates that the last reset was caused by a power-on reset.
1 Last reset caused by power-on reset
0 Last reset not caused by power-on reset
2 EXT External reset flag. Indicates that the last reset was caused by an external device
asserting the external RSTI pin.
1 Last reset state caused by external reset
0 Last reset not caused by external reset
1 LOC Loss-of-clock reset flag. Indicates that the last reset state was caused by a PLL loss
of clock.
1 Last reset caused by loss of clock
0 Last reset not caused by loss of clock
0 LOL Loss-of-lock reset flag. Indicates that the last reset state was caused by a PLL loss of
lock.
1 Last reset caused by a loss of lock
0 Last reset not caused by loss of lock
Table 29-5. Reset Source Summary
Source Type
Power on Asynchronous
External RSTI pin (not stop mode) Synchronous
External RSTI pin (during stop mode) Asynchronous
Watchdog timer Synchronous
Loss of clock Asynchronous
Loss of lock Asynchronous
Software Synchronous
LVD reset Asynchronous
Table 29-4. RSR Field Descriptions (continued)
Bit(s) Name Description
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3