Motorola ColdFire MCF5281 User Manual

Page 739

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Revision History

Freescale Semiconductor

B-3

Chapter 8, “System

Control Module

(SCM)

and

16.2/16-2

Moved information in Section 8.4.6, “DMA Request Control Register,” to

Section 16.2, “DMA Request

Control (DMAREQC)

.

Figure 8-2 on page

8-4

Changed offset for the copy of RAMBAR to “0x008.”

Table 8-5 on page

8-6

Changed CWTIC to CWTIF.

8.5.2.1/8-9

Changed text to read “Setting MPARK[PRK_LAST] causes the arbitration pointer to be parked on the
highest priority master.”

Figure 9-2 on page

9-4

Changed “

÷

MFD (2–9)” to “

÷

MFD (4–18).”

Table 9-7 on page

9-10

Changed equation in “Normal PLL Clock Mode” row to the following:
f

sys

= f

ref

×

2(MFD + 2)/2

RFD

Chapter 12, “Chip

Select Module

Eliminated Section 12.4.1.4, “Code Example.”

Figure 12-4 on page

12-8

In “Reset: CSCR0” row, changed “D7, D6, D5” to “—, D19, D18.”

Table 14-1 on page

14-3

Replaced “SCKE” with “SCKE.”

17.4.21/17-23

Changed text to read “The transmit FIFO uses addresses from the start of the FIFO to the location four
bytes before the address programmed into the FRSR.”

Table 17-29 on page

17-28

Added the following footnote: “The receive buffer pointer, which contains the address of the associated
data buffer, must always be evenly divisible by 16. The buffer must reside in memory external to the FEC.
This value is never modified by the Ethernet controller.”

Table 17-30 on page

17-29

Added the following footnote: “The transmit buffer pointer, which contains the address of the associated
data buffer, must always be evenly divisible by 4. The buffer must reside in memory external to the FEC.
This value is never modified by the Ethernet controller.”

Figure 18-1 on page

18-2

Changed value in “Divide by” block to 8192.

Table 19-3 on page

19-4

Multiplied all system clock divisor values in PRE field description by 2.

19.3.3/19-7

Changed equation in text to the following:
Timeout period = PRE[3:0]

× (

PM[15:0] + 1)

×

system clock

÷

2

Figure 23-12 on

page 23-14

In “UISR Field” row, changed bit 6 to a reserved bit.

Table 23-10 on page

23-14

Changed bit 6 to a reserved bit.

Table B-2. Rev. 0.1 to Rev. 1 Changes (continued)

Location

Description

MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3

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