Motorola ColdFire MCF5281 - Manual (Page 544)

Queued Analog-to-Digital Converter (QADC)
28-6 Freescale Semiconductor
28.4.6 Voltage Reference Signals
V
RH
and V
RL
are the dedicated input signals for the high and low reference voltages. Separating the
reference inputs from the power supply signals allows for additional external filtering, which increases
reference voltage precision and stability, and subsequently contributes to a higher degree of conversion
accuracy.
NOTE
V
RH
and V
RL
must be set to V
DDA
and V
SSA
potential, respectively. For
more information, refer to Section 28.9, “Signal Connection
Considerations .
28.4.7 Dedicated Analog Supply Signals
The V
DDA
and V
SSA
signals supply power to the analog subsystems of the QADC module. Dedicated
power is required to isolate the sensitive analog circuitry from the normal levels of noise present on the
digital power supply.
28.4.8 Dedicated Digital I/O Port Supply Signal
V
DDH
provides 5-V power to the digital I/O functions of QADC port QA and port QB. This allows those
signals to tolerate 5 volts when configured as inputs and drive 5 volts when configured as outputs.
28.5 Memory Map
The QADC occupies 1 Kbyte, or 512 half-word (16-bit) entries, of address space. Ten half-word registers
are control, port, and status registers, 64 half-word entries are the CCW table, and 64 half-word entries are
the result table which occupies 192 half-word address locations because the result data is readable in three
data alignment formats.
Table 28-2 is the QADC memory map.
Table 28-2. QADC Memory Map
IPSBAR +
Offset
MSB LSB Access
1
0x19_0000 QADC Module Configuration Register (QADCMCR) S
0x19_0002 QADC Test Register (QADCTEST)
2
S
0x19_0004 Reserved
3
—
0x19_0006 Port QA Data Register (PORTQA) Port QB Data Register (PORTQB) S/U
0x19_0008 Port QA Data Direction Register
(DDRQA)
Port QB Data Direction Register
(DDRQB)
S/U
0x19_000a QADC Control Register 0 (QACR0) S/U
0x19_000c QADC Control Register 1 (QACR1) S/U
0x19_000e QADC Control Register 2 (QACR2) S/U
0x19_0010 QADC Status Register 0 (QASR0) S/U
0x19_0012 QADC Status Register 1 (QASR1) S/U
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3