Motorola ColdFire MCF5281 - Manual (Page 607)

Queued Analog-to-Digital Converter (QADC)
Freescale Semiconductor 28-69
result is written for a CCW with the pause bit set, the queue pause flag is set, and when enabled, an
interrupt is requested. Refer to
Table 28-26 .
The pause and complete interrupts for queue 1 and queue 2 have separate interrupt vector levels, so that
each source can be separately serviced.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3