1 uart pins -5, 2 uart registers -5, 1 serial port 0 control register (scon0) -5 – Maxim Integrated MAXQ7666 User Manual
Page 223: Table 6-2. maxq7665/maxq7666 uart pins -5, 1 uart pins, 1 serial port 0 control register (scon0)
6.1.1 UART Pins
The MAXQ7665/MAXQ7666 UART supports dedicated transmit and receive pins as described in Table 6-2.
Table 6-2. MAXQ7665/MAXQ7666 UART Pins
6.2 UART Registers
The MAXQ7665/MAXQ7666 UART peripheral registers are described here.
6.2.1 Serial Port 0 Control Register (SCON0)
Register Description:
Serial Port 0 Control Register
Register Name:
SCON0
Register Address:
Module 00h, Index 1Dh
Bits 15 to 8: Reserved.
Bit 7: Serial Port Mode Bit 0/Framing Error Flag (SM0/FE). When FEDE (SMD0.0) is set to 1, this bit is the framing error flag that is
set upon detection of an invalid stop bit. It must be cleared by software. Modification of this bit when FEDE is set has no effect on the
serial mode. This bit functions as the serial port mode bit 0 when FEDE is 0. SM0 is used in conjunction with the SM2 and SM1 bits to
define the serial mode as shown in the
Serial Mode Definition table.
MAXQ7665/MAXQ7666 User’s Guide
6-5
PIN NUMBER
UART
EXTERNAL
SIGNAL
48-PIN
56-PIN
FUNCTION
UTX
22
25
UART Transmitter Output. This signal is the transmit output from the UART. In
synchronous mode, the shift clock is output on this pin.
URX
23
26
UART Receiver Input: This signal is the receive input for the UART. In
synchronous mode, this pin behaves as a bidirectional data line.
r = read, w = write
Bit #
15
14
13
12
11
10
9
8
Name
— — — — — — — —
Reset
0 0 0 0 0 0 0 0
Access
r r r r r r r r
Bit #
7
6
5
4
3
2
1
0
Name
SM0/FE
SM1 SM2 REN TB8 RB8 TI
RI
Reset
0 0 0 0 0 0 0 0
Access
rw rw rw rw rw rw rw rw
Maxim Integrated