Maxim Integrated MAXQ7666 - Manual (Page 31)

1.3 Programming
The following section provides a programming overview of the MAXQ7665/MAXQ7666. For full details on the instruction set, as well as
System Register and Peripheral Register detailed bit descriptions, see the appropriate sections in this user’s guide.
1.3.1 Addressing Modes
The instruction set for the MAXQ7665/MAXQ7666 provides three different addressing modes: direct, indirect, and immediate.
The direct addressing mode can be used to specify either source or destination registers, such as:
move A[0], A[1] ; copy accumulator 1 to accumulator 0
push A[0] ; push accumulator 0 on the stack
add A[1] ; add accumulator 1 to the active accumulator
Direct addressing is also used to specify addressable bits within registers.
move C, Acc.0 ; copy bit zero of the active accumulator
; to the carry flag
move PO0.3, #1 ; set bit three of port 0 Output register
Indirect addressing, in which a register contains a source or destination address, is used only in a few cases.
move @DP[0], A[0] ; copy accumulator 0 to the data memory
; location pointed to by data pointer 0
move A[0], @SP-- ; where @SP-- is used to pop the data pointed to
; by the stack pointer register
Immediate addressing is used to provide values to be directly loaded into registers or used as operands.
move A[0], #10h ; set accumulator 1 to 10h/16d
1.3.2 Prefixing Operations
All instructions on the MAXQ7665/MAXQ7666 are 16 bits long and execute in a single cycle. However, some operations require more
data than can be specified in a single cycle or require that high-order register-index bits be set to achieve the desired transfer. In these
cases, the prefix register module PFX is loaded with temporary data and/or required register index bits to be used by the following
instruction. The PFX module only holds loaded data for a single cycle before it clears to zero.
Instruction prefixing is required for the following operations, which effectively makes them two-cycle operations.
• When providing a 16-bit immediate value for an operation (e.g., loading a 16-bit register, ALU operation, supplying an absolute
program branch destination), the PFX module must be loaded in the previous cycle with the high byte of the 16-bit immediate
value unless that high byte is zero. One exception to this rule is when supplying an absolute branch destination to 00xxh. In
this case, PFX still must be written with 00h. Otherwise, the branch instruction would be considered a relative one instead of
the desired absolute branch.
• When selecting registers with indexes greater than 07h within a module as destinations for a transfer or registers with indexes
greater than 0Fh within a module as sources, the PFX[n] register must be loaded in the previous cycle. This can be combined
with the previous item.
MAXQ7665/MAXQ7666 User’s Guide
1-29
INTERRUPT MODULE ENABLE BIT LOCAL ENABLE BIT INTERRUPT FLAG
Digital Brownout IM5 (IMR.5) DVBIE (AIE.4) DVBI (ASR.4)
I/O Voltage Brownout IM5 (IMR.5) VIOBIE (AIE.5) VIOBI (ASR.5)
High-Frequency Oscillator Failure IM5 (IMR.5) HFFIE (AIE.6) HFFINT (ASR.6)
Table 1-6. MAXQ7665/MAXQ7666 Interrupt Sources and Control Bits (continued)
Maxim Integrated