4 spi clock register (spick) -8 – Maxim Integrated MAXQ7666 User Manual
Page 281
MAXQ7665/MAXQ7666 User’s Guide
9-8
9.2.4 SPI Clock Register (SPICK)
Register Description:
SPI Clock Register
Register Name:
SPICK
Register Address:
Module 01h, Index 09h
Bits 15 to 8: Reserved. Read 0, write ignored.
Bits 7 to 0: Clock Divide Ratio (CKR.7 to CKR.0). This 8-bit value determines the system clock divide ratio to be used for SPI mas-
ter mode baud-clock generation. This register has no function when operating in slave mode, as the SPI clock generation circuitry is
disabled. The frequency of the SPI master mode baud rate is calculated using the following equation:
SPI baud rate = 0.5 x system clock frequency / (CKR7:CKR0 + 1)
Bit #
15
14
13
12
11
10
9
8
Name — — — — — — — —
Reset 0 0 0 0 0 0 0 0
Access r r r r r r r r
Bit #
7
6
5
4
3
2
1
0
Name
CKR.7 CKR.6 CKR.5 CKR.4 CKR.3 CKR.2 CKR.1 CKR.0
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
r = read, w = write
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