Maxim Integrated MAXQ7666 - Manual (Page 238)

MAXQ7665/MAXQ7666 User’s Guide
7-3
SECTION 7: TYPE 2 TIMER/COUNTER MODULE
The MAXQ7665/MAXQ7666 microcontrollers have three Type 2 timer/counter modules. The Type 2 timer/counter is an auto-reload 16-
bit timer/counter with the following functions:
• 8-bit/16-bit timer/counter
• Up/down auto-reload
• Counter function of external pulse
• Capture
• Compare
The three Type 2 timer/counter modules supported in MAXQ7665/MAXQ7666 are referred to as timer 0, timer 1, and timer 2 in this doc-
ument. To simplify the discussion, the generic notation x is appended to register and pin names to denote the MAXQ7665/MAXQ7666
timer/counter module they belong to (x = 0, 1, and 2). Except where explicitly noted, the MAXQ7665 and MAXQ7666 support identi-
cal features.
7.1 Architecture
The Type 2 timer/counter module is operable as a single 16-bit timer/counter or as a dual 8-bit timer/counter. In 16-bit mode, the timer
is composed of three registers: T2Vx, T2Rx, and T2Cx. The T2Vx register is a 16-bit register that holds the current timer value. The
reload value for the timer is held in the 16-bit T2Rx register. The T2Cx register is a 16-bit register that holds the compare value when
operating in compare mode and gets the capture value when operating in capture mode. When operating in 16-bit mode (T2MD = 0),
the full 16 bits of registers T2Vx, T2Rx, and T2Cx are read/write accessible.
When T2MD = 1, each 16-bit register associated with the Type 2 timer is split into separate upper and lower 8-bit registers to support
dual 8-bit timers. Thus, the primary 8-bit timer is composed of T2Hx (value), T2RHx (reload), and T2CHx (capture/compare), and the
secondary 8-bit timer is composed of T2Lx (value), T2RLx (reload), and T2CLx (capture/compare). In the dual 8-bit mode, the upper
bytes of T2Vx, T2Rx, and T2Cx are inaccessible and always reads 00h. Separate T2Hx, T2RHx, and T2CHx registers are provided to
facilitate high-byte access for dual 8-bit mode.
Note: For convenience, the lower byte of T2Vx (T2Vx.7–T2Vx.0) is referred to as T2Lx. Unlike T2Hx, there is no separate T2Lx register
and the low byte is always accessed through T2Vx. Similarly, the lower byte of T2Rx (T2Rx.7–T2Rx.0) is referred to as T2RLx and the
lower byte of T2Cx (T2Cx.7–T2Cx.0) is referred to as T2CLx. There are no separate T2RLx and T2CLx registers.
The input clock for the Type 2 timer is defined as the system clock divided by the ratio specified by the T2DIV2:T2DIV0 prescale bits.
Two of the three Type 2 timers in the MAXQ7665/MAXQ7666 are connected to device pins as detailed in Table 7-1.
Figure 7-1 shows a simplified functional block diagram of a MAXQ7665/MAXQ7666 Type 2 timer/counter module in 16-bit mode. Figure
7-2 shows a MAXQ7665/MAXQ7666 Type 2 timer/counter in dual 8-bit mode. The input and output conditioning shown in the block dia-
grams is selected in the status/control registers T2CNAx (Type 2 timer/counter control register A), T2CNBx (Type 2 timer/counter control
register B), and T2CFGx (Type 2 timer/counter configuration register) in addition to other functionalities. See
Section 7.2 for detailed dis-
cussion of these registers.
Maxim Integrated