Maxim Integrated MAXQ7666 - Manual (Page 276)

SECTION 9: SERIAL PERIPHERAL INTERFACE (SPI) MODULE
The MAXQ7665/MAXQ7666 serial peripheral interface (SPI) module provides an independent serial communication channel to com-
municate synchronously with peripheral devices in a multiple master or multiple slave system. The interface allows access to a 4-wire
full-duplex serial bus that can be operated in either master mode or slave mode. The MAXQ7665/MAXQ7666 SPI features include the
following:
• 4-wire synchronous full-duplex communication
• Master or slave mode
• 8-bit or 16-bit character lengths
• Four standard SPI clocking modes
• Programmable baud-rate generator
• Mode-fault detection
• Data overrun and collision detection
• Interrupt or polled operation
• Maximum data rate: 1/8 the system clock for slave and 1/2 the system clock for master mode
9.1 Architecture
Figure 9-1 shows a simplified block diagram of the MAXQ7665/MAXQ7666 SPI. The main element in the SPI module is the block con-
taining the shift register and the read buffer. The shift register serves as the transmit and receive data buffer, while the read buffer is
the holding register for data received from the network and ready for the CPU to read. Each time that an SPI transfer completes, the
received character is transferred to the read buffer, giving double buffering on the receive side. No buffer overrun will occur as long
as the first character is read out of the data buffer before the next character is ready to be transferred into the read buffer. The SPI is
single buffered in the transmit direction. New data for transmission cannot be written to the shift register until the previous transfer is
completed. The CPU has read/write access to the control unit and the SPI data buffer (SPIB). The SPIB provides access for both trans-
mit data and receive data; reads are directed to the read buffer and writes to the shift register automatically.
Figure 9-1. SPI Block Diagram
SPIEN =
SPICN.0
MSTM = SPICN.1
SHIFT REGISTER
MOSI
SPIB WRITES
READ
BUFFER
SPIB READS
0
0
1
15/7
15/7
MISO
0
1
SPI STATUS & CONTROL UNIT
0
SCLK
1
0
SS
MAXQ7665/MAXQ7666 User’s Guide
9-3
Maxim Integrated