GE Industrial Solutions Entellisys 4.0 System User Manual - Manual (Page 190)

FlexLogic™ 190
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6. Now write the complete FlexLogic expression required to implement the logic, making an
effort to assemble the equation in an order where virtual outputs that are used as inputs to
operators are created before needed. In cases where a lot of processing is required to
perform logic, this may be difficult to achieve, but in most cases this does not cause
problems as all logic is calculated twice per power frequency cycle. The possibility of a
problem caused by sequential processing emphasizes the necessity of testing the
performance of FlexLogic before it is placed in service.
In the following equation, Virtual Output 3 is used as an input to both Latch 1 and Timer 1 as
arranged in the order shown below:
DIG ELEM 2 OP
Cont Ip H1c On
NOT
AND (2)
= Virt Op 3
Virt Op 4 On
Virt Op 1 On
Virt Op 2 On
Virt Ip 1 On
DIG ELEM 1 PKP
XOR (2)
Virt Op 3 On
OR (4)
LATCH (S, R)
Virt Op 3 On
TIMER 1
Cont Ip H1c On
OR (3)
TIMER 2
= Virt Op 4
END
In the expression above, the Virtual Output 4 input to the 4-input OR is listed before it is
created. This is typical of a form of feedback used to create a seal-in effect with the latch
and is correct.
7. The logic should always be tested after it is loaded into the system. Testing can be simplified
by placing an “END” operator within the overall set of FlexLogic equations. The equations is
then only evaluated up to the first “END” operator.
The “On” and “Off” operands can be placed in an equation to establish a known set of
conditions for test purposes, and the “Copy”, “Paste”, “Insert”, and “Delete” commands can be
used to modify equations.