1/2-slot addressing -10, 1/2-slot addressing, Slot 1 – Rockwell Automation 1747-ASB Remote I/O Adapter User Manual
Page 46: Slot 2, Input image output image
Publication 1747-UM006B-EN-P - June 2003
3-10 Addressing
1/2-Slot Addressing
When the 1747-ASB module is configured for 1/2-slot addressing, the
processor addresses one chassis slot as two logical groups. Each slot,
beginning with slot one, is sequentially assigned two words (32 bits)
of the 1747-ASB module's input and output image. Each terminal on
the I/O module is assigned a bit within the word, beginning with the
least significant bit. 1/2-slot addressing is designed to accommodate
I/O modules whose image size is less than or equal to two words but
more than one word.
To accommodate modules that require up to four words of input
and/or output image, the 1747-ASB module pairs slots beginning with
slot one (i.e., slot 1 is paired to slot 2, etc.). Slot pairing combines the
two words assigned to each slot (of either the input or output image,
whichever is required) and assigns all four words to one slot. This
maximizes I/O image space, allowing you to install an input module
in one slot and an output module in the other, each using up to four
words of the paired input and output images.
Slot 1
Slot 1 is assigned to the first two logical groups of the
1747-ASB module ’s image, beginning with bit 0 (the LSB).
Slot 2
1 5 1 4 1 3 1 2 11 1 0
9
8
7
6
5
4
3
2
1
0
group 0
Slot 1
group 1
1 5 1 4 1 3 1 2 11 1 0
9
8
7
6
5
4
3
2
1
0
group 2
Slot 2
group 3
Each terminal is assigned a bit,
beginning with the least significant bit.
Each terminal is assigned a bit,
beginning with the least significant bit.
Slot 2 is assigned to the next two logical groups of the
1747-ASB module ’s image, beginning with bit 0 (the LSB).
1 5 1 4 1 3 1 2 11 1 0
9
8
7
6
5
4
3
2
1
0
Group 0
Slot 1
Group 1
1 5 1 4 1 3 1 2 11 1 0
9
8
7
6
5
4
3
2
1
0
Group 2
Slot 2
Group 3
Each terminal is assigned a bit,
beginning with the least significant bit.
Each terminal is assigned a bit,
beginning with the least significant bit.
Decimal
Octal
7
0
10
17
Input Image
Output Image
Decimal
Octal
7
0
10
17
Decimal
Octal
7
0
10
17
Decimal
Octal
7
0
10
17
Input Image
Output Image