Motorola DSP56301 - Manual (Page 18)

Manual Conventions
1 -2 DSP56301 User’s Manual
n Chapter 6, Host Interface (HI32) HI32 features, signals, architecture, programming
model, reset, interrupts, external host programming model, initialization, and a quick
reference to the HI32 programming model.
n Chapter 7, Enhanced Synchronous Serial Interface (ESSI) Enhancements, data and
control signals, programming model, operating modes, initialization, exceptions, and
GPIO.
n Chapter 8, Serial Communication Interface (SCI) Signals, programming model,
operating modes, reset, initialization, and GPIO.
n Chapter 9, Triple Timer Module Architecture, programming model, and operating
modes of three identical timer devices available for use as internals or event counters.
n Appendix A, Bootstrap Program Bootstrap code for the DSP56301.
n Appendix B, Programming Reference Peripheral addresses, interrupt addresses, and
interrupt priorities for the DSP56301; programming sheets list the contents of the
major DSP56301 registers for programmer’s reference.
1.2 Manual Conventions
This manual uses the following conventions:
n Bits within registers are always listed from most significant bit (MSB) to least
significant bit (LSB).
n Bits within a register are indicated AA[n–m], n > m, when more than one bit is
involved in a description. For purposes of description, the bits are presented as if they
are contiguous within a register. However, this is not always the case. Refer to the
programming model diagrams or to the programming sheets to see the exact location
of bits within a register.
n When a bit is described as “set,” its value is 1. When a bit is described as “cleared,” its
value is 0.
n The word “assert” means that a high true (active high) signal is pulled high to V
CC
or
that a low true (active low) signal is pulled low to ground. The word “deassert” means
that a high true signal is pulled low to ground or that a low true signal is pulled high to
V
CC
. See Table 1-1.
Table 1-1. High True/Low True Signal Conventions
Signal/Symbol Logic State Signal State Voltage
PIN
1 True Asserted
Ground
2
PIN False Deasserted
V
CC
3