Motorola DSP56301 - Manual (Page 245)

SCI Programming Model
Serial Communication Interface (SCI) 8 -9
4. SCI idle line occurs when the receive line enters the idle state (10 or 11 bits of ones).
This interrupt is latched and then automatically reset when the interrupt is accepted.
This interrupt is enabled by SCR[10] (ILIE).
5. SCI timer occurs when the baud rate counter reaches zero. This interrupt is automati-
cally reset when the interrupt is accepted. This interrupt is enabled by SCR[13]
(TMIE).
8.6 SCI Programming Model
The SCI programming model can be viewed as three types of registers:
n Control
— SCI Control Register (SCR) in Figure 8-3
— SCI Clock Control Register (SCCR) in Figure 8-4
n Status
— SCI Status Register (SSR) in Figure 8-3
n Data transfer
— SCI Receive Data Registers (SRX) in Figure 8-7
— SCI Transmit Data Registers (STX) in Figure 8-7
— SCI Transmit Data Address Register (STXA) in Figure 8-7
The SCI includes the GPIO functions described in Section 8.7, GPIO Signals and Registers,
on page 8-24. The next subsections describe the registers and their bits.