Intel CHIPSET 820E - Manual (Page 126)

Intel ® 820E Chipset
R
126 Design Guide
Table 27. Hub Interface
Checklist Items Recommendations Reason/Effect
HL[11] No pull-up resistor is required. Use a no-stuff or a test point to put the
ICH2 into NAND chain mode testing.
HL_COMP Tie the COMP pin to a 40 Ω , 1% or 2% (or
39 Ω , 1%) pull-up resistor (to 1.8 V), via a
10 mil wide, very short (~0.5 inch) trace.
ZCOMP no longer supported.
Table 28. LAN Interface
Checklist Items Recommendations Reason/Effect
LAN_CLK Connect to platform LAN connect device.
LAN_RXD[2:0] Connect to LAN_RXD on platform LAN
connect device. ICH2 contains integrated 9K pull-up
resistors on interface
LAN_TXD[2:0]
LAN_RSTSYNC
Connect to LAX_TXD on platform LAN
connect device.
LAN connect interface can be left NC if not
used. Input buffers are terminated internally.
Table 29. EEPROM Interface
Checklist Items Recommendations Reason/Effect
EE_DOUT Prototype boards should include a
placeholder for a pull-down resistor on this
signal line, but should not populate the
resistor. Connect to EE_DIN of EEPROM
or CNR connector. Connected to EEPROM data input
signal. (Input from EEPROM perspective
and output from ICH2 perspective.)
EE_DIN No extra circuitry is required. Connect to
EE_DOUT of EEPROM or CNR connector. ICH2 contains integrated pull-up resistor
for this signal.
Connected to EEPROM data output
signal. (Output from EEPROM
perspective and input from ICH2
perspective.)
Table 30. FWH Flash BIOS Interface
Checklist Items Recommendations Reason/Effect
FWH[3:0]
LAD[3:0]
LDRQ[1:0]
No extra pull-ups required. Connect
straight to FWH Flash BIOS. ICH2 Integrates 24 k Ω resistors on
these signal lines.