Intel CHIPSET 820E - Manual (Page 29)

Intel ® 820E Chipset
R
Design Guide 29
2.3. Intel
®
820E Chipset Component Placement
Notes:
1. The ATX and NLX placements and layouts shown in the following figure are recommended for
single (UP) Intel 820E chipset-based system design.
2. The trace length limitation between critical connections will be discussed later in this document.
3. The figure is for reference only.
Figure 7. Sample ATX and NLX MCH/ICH2 Component Placement
atx_mch-ich2_place
RDRAM Termination
AGP
2.0
Direct
RDRAM
CPU Host
Bus
Hub
Interface
ICH2
MCH
nlx_mch-ich2_place
RDRAM* Termination
MCH
ICH2
AGP 2.0
Direct RDRAM
CPU Host Bus
Hub Link
b. Sample NLX MCH/ICH2 Component Placement
a. Sample ATX MCH/ICH2 Component Placement
Note: Actual ICH2 placement may vary.