Intel CHIPSET 820E - Manual (Page 49)

Intel ® 820E Chipset
R
Design Guide 49
The CTAB can be implemented on the multiple layers to minimize routing and space constraints. Figure
28 shows the use of CTABs on the top and bottom layer for bottom-layer RSL and clocking signals
routed between RIMMs.
Figure 28. Bottom-Layer CTABs Split across the Top and Bottom Layer to Achieve an Effect
C
EFF
~1.35 pF
2.7.2.5. RSL Signal Layer Alternation
RSL signals must alternate layers as they are routed through the channel. If a signal is routed on the
primary layer from the MCH to the first RIMM socket, it must be routed on the secondary layer from the
first RIMM to the second RIMM, as shown in Figure 29 (signal B). If a signal is routed on the secondary
layer from the MCH to the first RIMM socket, it must be routed on the primary side from the first RIMM
to the second RIMM, as shown in Figure 29 (signal A). Signals can be routed on either layer from the
last RIMM to the termination resistors.