Intel CHIPSET 820E - Manual (Page 32)

Intel ® 820E Chipset
R
32 Design Guide
2.5. Source-Synchronous Strobing
A technology used in AGP 4 × , Direct RDRAM and the hub interface, source-synchronous strobing
allows very high data transfer rates. As buses become faster and cycle times become shorter, the
propagation delay becomes a limiting factor in the bus speed. Source-synchronous strobing is used to
minimize the effect of propagation delay (T
PROP
) on maximum bus frequency.
A source-synchronous-strobed interface uses strobe signals, instead of the clock, to indicate that data is
valid. Refer to the following example figure:
Figure 10. Data Strobing Example
Clock
Strobe
Data
Data
Sample
data_str
For a source-synchronous-strobed interface, it is very important that the strobe signals be routed
carefully. These signals must be very clean (i.e., free of noise). Data signals typically are latched on the
rising or falling edge of the strobe signal (or both). If there is noise on these signals, it could cause an
extra “edge” to be detected, thus latching incorrect data. Refer to the following example figures.
Figure 11. Effect of Crosstalk on Strobe Signal
strobing_example
Clock
data
Threshold
Strobe
Data correctly
latched as 0 Clock
data
Threshold
Strobe
Noise
(i.e.,
crosstalk)
Data incorrectly
latched as 1
a) Correct Strobing Example (no noise) b) Effect of Cross Talk on Strobe Signal
Some buses have more than one strobe (i.e., AGP). The AGP 1.0 specification (1 × and 2 × modes)
employs three strobe signals, each of which is used to strobe different data signals (i.e., each strobe has
an associated set of data signals). The associations for AGP 1.0 (AGP 2
× ) are listed in the following
table. Refer to Section 2.8 for more information on AGP 2.0 (AGP 4 × , 1.5 V).