Un-used gates decoupling – Intel CHIPSET 820E User Manual
Page 236
3-20-2000_10:14
DECOUPLING
40
C137
4.7UF
4.7UF
C136
C131
4.7UF
4.7UF
C139
4.7UF
C134
4.7UF
C135
C141
4.7UF
4.7UF
C132
C138
4.7UF
C133
4.7UF
C360
0.1UF
0.1UF
C359
0.1UF
C362
C361
0.1UF
U3
10
9
8
7
14
U20
7
14
11
10
U18
7
14
11
13
12
0.1UF
C461
0.1UF
C460
0.1UF
C459
0.1UF
C453
0.1UF
C452
0.1UF
C451
C449
0.1UF
0.1UF
C221
0.1UF
C60
C2
9
0.1UF
0.1UF
C30
C201
0.1UF
C156
0.01UF
0.01UF
C213
0.1UF
C253
0.1UF
C231
C232
0.1UF
C248
0.1UF
C254
0.01UF
0.01UF
C224
C230
0.01UF
C252
0.01UF
C105
0.1UF
C290
4.7UF
U15
14
7
10
11
U14
14
7
98
U19
4
3
7
14
U19
14
7
11
10
U19
12
13
7
14
C202
0.01UF
C212
0.1UF
C157
0.1UF
0.1UF
C197
0.01UF
C344
C343
0.01UF
0.01UF
C367
0.01UF
C368
0.01UF
C162
0.01UF
C166
4.7UF
C88
0.1UF
C448
0.1UF
C450
0.1UF
C462
0.1UF
C463
0.1UF
C454
0.1UF
C457
0.1UF
C456
0.1UF
C455
0.1UF
C466
0.1UF
C465
0.1UF
C464
0.1UF
C458
U18
7
14
3
2
1
U20
12
13
14
7
0.01UF
C414
0.01UF
C415
U24
10
14
7
9
8
U24
13
14
7
12
11
U23
6
14
7
5
4
U23
7
14
8
10
9
U23
11
14
7
13
12
U24
4
14
7
6
5
VCCVID
VCCVID
VCC1_8
VCC3_3SBY
SN74LVC08A
SN74LVC06A
GND
VCC
74LS132
VCC
GND
VTT1_5
VTT1_5
VDDQ
DRAWN BY:
LAST REVISED:
SHEET:
FOLSOM, CALIFORNIA 95630
1900 PRAIRIE CITY ROAD
87
6
5
4
3
2
1
A
B
C
D
1
2
3
4
5
6
7
8
D
C
B
A
PCG PLATFORM DESIGN
REV:
0.5
PROJECT:
OF 40
TITLE: INTEL(R) 820E CHIPSET 2 DIMM FCPGA REFERENCE BOARD
R
PCG AE
Camino2
VCC3_3
VCC3_3SBY
VCC3_3
VCC1_8
74LVC14A
VCC3_3SBY
SN74LVC07A
GND
VCC
SN74LVC07A
GND
VCC
SN74LVC07A
GND
VCC
SN74LVC07A
GND
VCC
VCC3_3SBY
74LS132
VCC
GND
VCC5SBY
VCC3_3SBY
SN74LVC06A
GND
VCC
VCC3_3SBY
VCC3_3SBY
GND
VCC
SN74LVC02A
GND
VCC
SN74LVC02A
SN74HC03
VCC
GND
SN74HC03
VCC
GND
SN74HC03
VCC
GND
GND
VCC
SN74LVC02A
MCH Decoupling
Un-used Gates
Decoupling
at each corner of the device. If there is room, also add 0.01UF capacitor
For chipset decoupling, use 0.1UF and 0.01UF decoupling capacitor
in the middle of each quad. Place additional caps if routable.
ICH Decoupling
NOTE: Place VDDQ decoupling as close to the MCH as possible
82559 Decoupling
FCPGA VCC_CORE Decoupling
FCPGA Vtt Decoupling
MCH Decoupling
Backside No Stuff
Backside No Stuff - C414,C415
within the PGA370 socket cavity on componet side of PCB.
All 4.7uF capacitors should be 1206 package size placed