Intel CHIPSET 820E - Manual (Page 88)

Intel ® 820E Chipset
R
88 Design Guide
Figure 52. CDC_DN_ENAB# Support Circuitry for Multi-Channel Audio Upgrade
Primary
Audio
Codec
RESET#
SDATA_IN
Audio
Codec
RESET#
ID0#
SDATA_IN
AC97_RESET#
CDC_DN_ENAB#
CNR Board Motherboard
R
A
10 k Ω Ω Ω Ω
To General
Purpose Input
From AC '97
Controller
CNR Connector
SDATA_IN0
SDATA_IN1
To AC '97
Digital
Controller
Vcc
R
B
100 k
Ω Ω Ω Ω
Figure 52 shows the circuitry required on the motherboard to support a two-codec down configuration.
This circuitry disables the codec on a single codec CNR. Notice that in this configuration the resistor,
R
B
, has been changed to 100 kΩ.
Figure 53. CDC_DN_ENAB# Support Circuitry for Two-Codecs on Motherboard / One-Codec on
CNR
Primary
Audio
Codec
RESET#
SDATA_IN
Audio
Codec
RESET#
ID0#
SDATA_IN AC97_RESET#
CDC_DN_ENAB#
CNR Board Motherboard
R
A
10 k Ω Ω Ω Ω
To General
Purpose Input
From AC '97
Controller
CNR Connector
SDATA_IN0
SDATA_IN1
To AC '97
Digital
Controller
Secondary
Codec
RESET#
SDATA_IN
Vcc
R
B
100 k Ω Ω Ω Ω
Figure 53 shows the case of two-codecs down and a dual-codec CNR. In this case, both codecs on the
motherboard are disabled (while both on CNR are active) by R
A
being 10 kΩ and R
B
being 1 kΩ.