Intel CHIPSET 820E - Manual (Page 87)

Intel ® 820E Chipset
R
Design Guide 87
Figure 51. CDC_DN_ENAB# Support Circuitry for a Single Codec on Motherboard
Codec A
RESET#
SDATA_IN
Codec C
RESET#
SDATA_IN
AC97_RESET#
Vcc
CDC_DN_ENAB#
CNR Board Motherboard
R
A
10 k
Ω Ω Ω Ω
R
B
1 k
Ω Ω Ω Ω
To General
Purpose Input
From AC '97
Controller
CNR Connector
To AC '97
Digital
Controller
SDATA_IN0
SDATA_IN1
Codec D
RESET#
SDATA_IN
As shown in Figure 51, when a single codec is located on the motherboard, the resistor R
A
and the
circuitry (AND and NOT gates) shown inside the dashed box must be implemented, on the motherboard.
This circuitry is required in order to disable the motherboard codec when a CNR is installed which
contains two AC ’97 codecs (or a single AC ’97 codec which must be the primary codec on the AC-
Link).
By installing resistor R
B
(1 kΩ) on the CNR, the codec on the motherboard becomes disabled (held in
reset) and the codec(s) on the CNR take control of the AC-Link. One possible example of using this
architecture is a system integrator installing an audio plus modem CNR in a system already containing an
audio codec on the motherboard. The audio codec on the motherboard would then be disabled, allowing
all of the codecs on the CNR to be used.
The architecture shown in Figure 52 has some unique features. These include the possibility of the CNR
being used as an upgrade to the existing audio features of the motherboard (by simply changing the value
of resistor R
B
on the CNR to 100 kΩ). An example of one such upgrade is increasing from two-channel
to four or six-channel audio.
Both Figure 52 and Figure 53 show a switch on the CNR board. This is necessary to connect the CNR
board codec to the proper SDATA_INn line as to not conflict with the motherboard codec(s).