Intel CHIPSET 820E - Manual (Page 229)

3-20-2000_10:15
33
VRM 8.4
IFB_Q
Q21
5
6
7
8
3
2
1
4
VID3 VID0 VID2 VID1
VID[3:0]
3
C472
2200UF
1 2
C471
1200UF
1 2
C469
1200UF
1 2
C468
1200UF
1 2
R71
5.1-5%
OUTEN
VRM_PWRGD
4,8,9,36
2200UF
C100
2 1
C93
2200UF
1 2
2200UF
C103
2 1
1200UF
C87
2 1
C111
1200UF
1 2
1200UF
C107
2 1
R55
8.2K
R53
5.6K
VRM_COMP
VRM_SS
VRM_IFB VRM_FAULT VRM_VFB
VRM_COMP_ R
R80
10K
PVCC_R
C72
0.01U F
1 2
C90
0.1U F
C73
150PF
C75
0.1U F
C86
0.1U F
10UF
C140
2 1
C74
0.01U F
C71
1000PF
1UF-X 7R
C118
2 1
1UF-X 7R
C119
1 2
VR3
18 17 16 15 14 19
6
9
4
3
7 13 20 8 1
5
2
12
10
11
VRM_IMAX
ETQP6F0R8L
1.0UH-20A
L18
1UF-X 7R
C97
2 1
C82
1200UF
1 2
C467
1200UF
1 2
C470
1200UF
1 2
C110
2200UF
1 2
JP6
JP10
JP7
JP8 DO3316P-331HC 0.33U H
L19
VRM_VCC5
Q2
5
6
7
8
3
2
1
4
Q3
5
6
7
8
3
2
1
4
Q5
5
6
7
8
3
2
1
4
Q4
5
6
7
8
3
2
1
4
1K
R54
VRM_G2 VRM_G1
R65 20
R332
220
IRF7811A
G1
S1
S2
S3
D1
D2
D3
D4
+
+
+
+
DRAWN BY: LAST REVISED:
SHEET:
FOLSOM, CALIFORNIA 95630 1900 PRAIRIE CITY ROAD
87
6
5
4
3
2
1
A B C D
1
2
3
4
5
6
7
8
D C B A
PCG PLATFORM DESIGN
REV:
0.5
PROJECT:
OF 40
TITLE: INTEL(R) 820E CHIPSET 2 DIMM FCPGA REFERENCE BOARD
R
PCG AE
Camino2
VCC3_3
+
+
+
+
+
+
VCCVID
VCC5
VCC12
+
+
+
+
LTC1753
SENSE
SS
SGND
GND
VCC
PVCC
COMP
VID4 VID3 VID2 VID1 VID0 OUTEN
IMAX PWRGD FAULT#
G1 G2 IFB VFB
VCC5
+
+
+
+
+
IRF7811A
G1
S1
S2
S3
D1
D2
D3
D4
IRF7811A
G1
S1
S2
S3
D1
D2
D3
D4
IRF7811A
G1
S1
S2
S3
D1
D2
D3
D4
IRF7811A
G1
S1
S2
S3
D1
D2
D3
D4
VRM
Sanyo 4SP2200M
VRM requirements are based on VRM8.4 spec .
Place caps next to output FETs.
No Stu ff C8 6
C82,C87,C107,C111,C467-C471 must support >11A of RMS current.
C118, C119 must be next to drain of Q2,Q3