Intel CHIPSET 820E User Manual

Page 203

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3-20-2000_14:02

MCH

7

4.7K

R248

PWROK

8,9,34,36

U14

14

7

13

12

HL10

7,8

GAD1

GAD2

GAD3

GAD4

GAD5

GAD6

GAD7

GAD8

GAD9

GAD10

GAD11

GAD12

GAD13

GAD14

GAD15

GAD16

GAD17

GAD18

GAD19

GAD20

GAD21

GAD22

GAD23

GAD24

GAD25

GAD26

GAD27

GAD28

GAD29

GAD30

GAD31

24

GAD[31:0]

GAD0

HL2

HL1

8

HL[10:0]

HL0

HL10

HL9

HL8

HL7

HL6

HL5

HL4

HL3

HL_STB

8

HL_STB#

8

GC/BE#2

GC/BE#1

GC/BE#0

GC/BE#[3:0]

24

GC/BE#3

24,38

GTRDY#

24,38

GIRDY#

24,38

GDEVSEL#

24,38

GFRAME#

GPAR

24,38

24,38

GSTOP#

SBSTB#

24,38

ADSTB1

24,38

ADSTB0

24,38

WBF#

24,38

24,38

PIPE#

24,38

GREQ#

24,38

GGNT#

ST2

ST0

ST1

ST[2:0]

24

5

MCH_CLK66

24,38

RBF#

ADSTB#0

24,38

ADSTB#1

24,38

SBSTB

24,38

HCLKOUT

5

RCLKOUT

5

24

SBA[7:0]

SBA1

SBA3

SBA4

SBA5

SBA6

SBA7

SBA2

SBA0

4,5

SEL133/100#

R209

8.2K

8.2K

R227

7

PWROK_CTRL

11

LDQA[8:0]

LDQA1

LDQA0

LDQA2

LDQA3

LDQA4

LDQA5

LDQA6

LDQA7

LDQA8

11

LDQB[8:0]

LDQB0

LDQB1

LDQB2

LDQB3

LDQB4

LDQB5

LDQB6

LDQB7

LDQB8

11

LROW[2:0]

LROW0

LROW1

LROW2

11

LCLKTM#

11

LCLKFM

11

LCLKFM#

11

LSIO

11

LCOL[4:0]

LCOL1

LCOL2

LCOL3

LCOL4

LCOL0

11

LCLKTM

U10

Y19

Y20

W17

Y18

W18

A16

A9

B9

C9

F19

C4

A4

B5

A5

C5

A6

C6

B7

C7

C16

A15

C15

B14

C14

A14

C13

A13

A2

B1

C20

D19

D18

C18

D17

A20

B18

B19

B20

E19

E17

F18

A7

C8

A8

A10

C10

B11

A11

A12

B12

B3

B2

C2

W20

V17

V20

W19

V19

U16

R19

R18

H20

J19

Y17

Y15

W15

V15

V16

W16

Y16

U15

K16

M18

M20

N20

N19

L16

R16

N18

L20

H16

U19

U20

T18

U18

T16

U17

R17

T20

R20

P16

P20

N16

P17

M16

P18

M17

L18

K20

L19

J18

K18

K17

J16

J20

H18

H17

G20

G16

G19

G17

G18

F17

Q10

MM

BT3904LT1

B

C

E

11

LCMD

LCMD

MM

BT3904LT1

Q9

E

C

B

4.7K

R229

Q14

MMBT3904LT1

B

C

E

11

LSCK

7

PWROK_CTRL

DRAWN BY:

LAST REVISED:

SHEET:

FOLSOM, CALIFORNIA 95630

1900 PRAIRIE CITY ROAD

87

6

5

4

3

2

1

A

B

C

D

1

2

3

4

5

6

7

8

D

C

B

A

PCG PLATFORM DESIGN

REV:

0.5

PROJECT:

OF 40

TITLE: INTEL(R) 820E CHIPSET 2 DIMM FCPGA REFERENCE BOARD

R

PCG AE

Camino2

VCC3_3SBY

SN74LVC07A

GND

VCC

VCC3_3SBY

MCH_096

HUB

AGP

MEMORY

AGP

G_AD0

G_AD1

G_AD2

G_AD3

G_AD4

G_AD5

G_AD6

G_AD7

G_AD8

G_AD9

G_AD10

G_AD11

G_AD12

G_AD13

G_AD14

G_AD15

G_AD16

G_AD17

G_AD18

G_AD19

G_AD20

G_AD21

G_AD22

G_AD23

G_AD24

G_AD25

G_AD26

G_AD27

G_AD28

G_AD29

G_AD30

G_AD31

G_C/BE#0

G_C/BE#1

G_C/BE#2

G_C/BE#3

G_FRAME#

G_DEVSEL#

G_IRDY#

G_TRDY#

G_STOP#

G_PAR

G_REQ#

G_GNT#

PIPE#

RBF#

WBF#

ST0

ST1

ST2

AD_STB0

AD_STB#0

AD_STB1

AD_STB#1

SBA7

SBA6

SBA5

SBA4

SBA1

SBA0

SIO

SCK

CMD

CFM#

CFM

CTM#

CTM

RQ7

RQ6

RQ2

RQ1

RQ0

HL1

HL2

HL3

HL4

HL5

HL6

HL7

HL8

HL9

HL10

HL_STB

HL_STB#

RCLKOUT

HCLKOUT

DQA0

DQA1

DQA2

DQA3

DQA4

DQA5

DQA6

DQA7

DQB0

DQB1

DQB2

DQB3

DQB4

DQB5

DQB6

DQB7

DQB8

HL0

RQ3

RQ4

RQ5

DQA8

CLK66

SBA2

SBA3

SB_STB

SB_STB#

1

3

2

1

3

2

VCC5SBY

1

3

2

LSCK and LCMD must neck down to 5 mils for 175 mils at Q10 and Q9 attach points.

Place Q10 and Q9 as close as possible to MCH.

MCH

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