Rockwell Automation SD3000 Drive Configuration, Programming - Manual (Page 41)

3.4 Feedback Registers (Registers 200-299, 1200-1 299)
The Feedback Registers view is used to configure the feedback registers that display the current
status of the drive. These registers are updated by the PMI Processor and sent to the UDC module
over the fiber-optic link before every scan of the UDC task. The status of these registers is retained
after a Stop All.
200/1 200 Drive Status Register
These bits indicate the current state of the drive. The bits reflect the status of the activity initiated
through the Drive Control register (register 100/1 100).
Bit: 0
Hex Value:
0001 H
Sug. Var. Name: CML_ON@
Range: N/A
Access: Read Only
UDC Error Code: N/A
LED: N/A
Description: The PMI Processor sets the CML On bit in response to the CML_RUN@ command after
all of the interlock tests are passed to indicate that the minor loop is running and the motor is
energized.
Bit: 1
Hex Value: 0002H
Sug. Var. Name:
CML_IDC@
Range: N/A
Access: Read Only
UDC Error Code: N/A
LED: N/A
Description: The Armature Identification Test Complete bit is set when the armature identification test
is finished.(See register 100/1 100, bit 1). When the request for the function is turned off, this bit will
be turned off.
Bit: 2
Hex Value: 0004H
Sug. Var. Name:
CML_LIM@
Range: N/A
Access: Read Only
UDC Error Code: N/A
LED: N/A
Description: The Current Minor Loop in Limit bit is set when the advance of the firing angle is being
limited or the bridge is full on. This bit is normally off.
Bit: 3
Hex Value: 0008H
Sug. Var. Name:
CML_MAX@
Range: N/A
Access: Read Only
UDC Error Code: N/A
LED: N/A
Description: The Maximum Firing Angle Reached bit is set by the PMI Processor when the system is
firing at the maximum firing angle of
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