3 udc/pmi task communication – Rockwell Automation SD3000 Drive Configuration, Programming User Manual

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3 . Enter the desired value into the “CURRENT” field for each LOCAL statement.

The programmer can choose to enter the desired values for any local tunables in the “CURRENT”
field of the corresponding LOCAL statement or leave them unchanged.

4.2.3 UDC/PMI Task Communication

Coordination between the two PMls running their respective PMI tasks (drives A and B) and the UDC
module running the corresponding UDC tasks is managed through the command and feedback
messages sent over the fiber-optic link. The programmer does not control the operating system on

the PMI. The timing of the PMI is based on the regulator selected.

A command message is sent to the PMI by the UDC module at the end of every scan of the UDC
task. Each message contains the data in registers 100-1 06/1100-1106, rail data, and the values of the

pre-defined local tunables that have changed. Note that some data may be sent over the course of
several command messages.

A feedback message is sent to the UDC module by the PMI immediately before the beginning of

every scan of the UDC task, i.e., immediately before the CCLK timer expires. Each message contains

the data for registers 200-221 /1200-1 221, as well as any rail data that has changed from the last
feedback message.

The exchange of command and feedback register data is synchronized through the use of the

constant clock signal (CCLK) on the UDC module as described below. CCLK also enables the
coordination of all UDCs in a rack because they will all use the same time base for task execution.
Note that all UDC modules in a rack are not required to have the same value in the TICKS parameter
of the SCAN-LOOP block in both their tasks. In other words, if the UDC module in slot 6 has
TICKS=10 in its tasks, and the UDC module in slot 7 has TICKS=20 in its tasks, the tasks on the

UDC module in slot 6 will execute twice as often as the tasks on the UDC module in slot 7, but they

will execute on the same time basis, i.e., time zero is determined by CCLK timer expiration.

As soon as the UDC module and PMI are connected over the fiber-optic link, the PMI will request its
operating system from the UDC module. Recall that the PMI operating system is part of the UDC
operating system. As long as the UDC module has its own operating system and parameter object
file, it will download to the PMI the correct operating system.

In order for the PMI and the UDC module to be synchronized, the UDC module must have its

operating system, parameter object file, and configuration loaded. In addition, CCLK must be turned
on in the AutoMax rack.

If the UDC tasks are already loaded onto the UDC module when the PMI requests its operating
system, the UDC module will also send information about when the PMI should send feedback
register data required by the UDC task(s). This ensures that the data is measured or calculated as
close as possible to the time it is needed in order to ensure it is as current as possible for the next
scan of the UDC task(s).

The UDC operating system determines the feedback register message timing required by examining

the SCAN-LOOP block in each UDC task so that the feedback will arrive at the UDC module just
before it is needed. For example, if the TICKS parameter value in the SCAN-LOOP block were 10,
feedback data would be needed by the UDC module immediately before 10 x 500

time expires.

At first, when the UDC module and PMl(s) are powered up and connected via the fiber-optic link, their
system clocks are not synchronized. In order for the PMI and UDC module to be synchronized to the
same clock signal for communicating command and feedback data on a regular and predictable
basis, an AutoMax task must turn on the CCLK signal in the rack. Until CCLK is turned on, command
and feedback messages are sent periodically, but not on a predictable basis. CCLK can be turned on
by setting the appropriate bit in UDC register 2000 (the interrupt status and control register for both A
and B drive tasks), or by setting a bit in another module that can turn on CCLK. Only one module in
the rack must turn on CCLK. Note that after a STOP ALL occurs in the rack, CCLK will be disabled
and must be re-enabled again in order for UDC tasks to go into run. See figure 4.2 for the typical data
flow between the UDC module and the PMI.

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