Rockwell Automation SD3000 Drive Configuration, Programming - Manual (Page 77)

To verify that communication between the UDC module and the PMI is resulting in up-to-date
feedback data, it is recommended that the drive’s run permissive logic include the CCLK
synchronized status bit (register 200/1200, bit 14, CCLK_OK@)
and the communication lost fault bit
(register 202/1202, bit 15, COM_FLT@) as shown below:
I
S t a r t
Permissive
L o g i c
I
Refer to the individual bit descriptions in this manual for more information.
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