Toshiba T2N - Manual (Page 193)

3. User Data
180 PROSEC T2N
Both odd-numbered addresses and even-numbered addresses
may be used as register A.
(5) Double-Length Integers
These are 32-bit integers which are expressed using 2
consecutive registers. Negative numbers are expressed by 2's
complement. (See (2) ‘Integers’)
The registers are designated in the form A +1• A .
A becomes the lower and A +1 becomes the upper.
The numerical value is expressed by the 31 bits from bit 0 of
register A to bit E of register A +1. The sign is expressed by
bit F of register A +1 (0 when positive, 1 when negative).
Example) When a double-length integer is processed by
registers D1002•D1001, D1001 becomes A and D1002
becomes A +1, and D1001 is the lower and D1002 is the upper.
Also, the sign is expressed by the bit F of D1002.
In programming, when D1001 is entered in the position which
designates the instruction word double-length operand,
D1002•D1001 is automatically displayed.
The numerical value range in which double-length integers can
be processed is shown in the Table on the following page
NOTE
Register A = Lower 16 bits
Bit positions
▼ ▼ ▼
F bit of register A +1 = Sign bit (positive: 0, negative: 1)
0 - E bits of register A +1 = Upper 15 bits
▼
(MSB) (LSB)
F E – – – – – 0 F – – – – – – 0
Numerical Value
Hexadecimal Expression
Register A +1 Register A
4294967295 FFFF FFFF
∫ ∫ ∫
65536 0001 0000
65535 0000 FFFF
∫ ∫ ∫
0 0000 0000