Achronix Speedster22i User Macro Guide - Manual (Page 114)

Memories BRAM80K
Speedster22i Macro Cell Library Achronix Semiconductor Proprietary PAGE 97
Table 6-10: douta(doutb) bit assignments per porta_read_width(portb_read_width) values
porta_read_width,
portb_read_width
doutpxa[3:0],
doutpxb[3:0]
doutpa[3:0],
doutpb[3:0]
douta[31:0],
doutb[31:0]
user_dout[39:36] user_dout[35:32] user_dout[31:0]
4’hx user_dout[35:32] user_dout[31:0]
4’hx 4’hx user_dout[31:0]
2’bxx,user_dout[19:18] 2’bxx,user_dout[17:16] 16’hxxxx,user_dout[15:0]
4’hx user_dout[17:16] 16’hxxxx,user_dout[15:0]
4’hx 4’hx 16’hxxxx,user_dout[15:0]
3’bxxx,user_dout[9] 3’bxxx,user_dout[8] 24’hxxxxxx,user_dout[7:0]
4’hx 3’bxxx,user_dout[8] 24’hxxxxxx,user_dout[7:0]
4’hx 4’hx 24’hxxxxxx,user_dout[7:0]
4’hx 3’bxxx,user_dout[4] 28’hxxxxxxx,user_dout[3:0]
4’hx 4’hx 28’hxxxxxxx,user_dout[3:0]
4’hx 4’hx 30’hxxxxxxxx,user_dout[1:0]
4’hx 4’hx 31’hxxxxxxxx,user_dout[0]
Table 6-11: BRAM80K Address Bus Mapping (Per Port)
Memory
Organization
Used Address
addra/addrb Pins
Unconnected
Address Pins
40
36
32
20
18
16
10
9
8
5
4
2
1
2kx40 15:5 4:0
2kx36 15:5 4:0
2kx32 15:5 4:0
4kx20 15:4 3:0
4kx18 15:4 3:0
4kx16 15:4 3:0
8kx10 15:3 2:0
8kx9 15:3 2:0
8kx8 15:3 2:0
16kx5 15:2 1:0
16kx4 15:2 1:0
32kx2 15:1 0
64kx1 15:0 -