Achronix Speedster22i User Macro Guide - Manual (Page 196)

Multipliers BMACC56
Speedster22i Macro Cell Library Achronix Semiconductor Proprietary PAGE 179
sel_cin
The sel_cin parameter defines what is routed to the cin input of the add/sub block. The cin
input may be selected from the registered or non‐registered cin input, or forcing it to a
constnat value of 0 or 1.The sel_cin parameter defaults to the value 2’b00.
Table 7-4: Add/Sub Block Carry Input Assignment
sel_cin Add/Sub Block Cin Assignment
2’b00 Select the cin input to drive the add/sub cin input.
2’b01 Select the output of the Carry In Input Register to drive the add/sub cin input.
2’b10 Select 1’b0 to drive the add/sub cin input.
2’b11 Select 1’b1 to drive the add/sub cin input.
sel_sub
The sel_sub parameter defines what is routed to the sub input of the add/sub block. The sub
input may be selected from the registered or non‐registered sub input, or force it to a constant
value of 0 or 1.The sel_sub parameter defaults to the value 2’b00.
Table 7-5: Add/Sub Block Sub Input Assignment
sel_sub Add/Sub Block Cin Assignment
2’b00 Select the sub input to drive the add/sub sub input.
2’b01 Select the output of the Sub Input Register to drive the add/sub sub input.
2’b10 Select 1’b0 to drive the add/sub sub input.
2’b11 Select 1’b1 to drive the add/sub sub input.
mult_bypass
The mult_bypass parameter determines whether the 28x28 multiplier is used or bypassed.
Setting mult_bypass to 1’b0 enables the multiplier while setting mult_bypass to 1’b1 bypasses
the multiplier and routes the concatenated a[27:0],b[27:0] data the the multout[55:0] output.
The mult_bypass parameter defaults to the value of 1’b0.
clock_edge
The clock_edge parameter defines which edge of the Clock input is used by all of the input
and output registers. Setting clock_edge to 1’b0 selects the rising edge of the clock as the
active edge while setting clock_edge to 1’b1 selects the falling edge of the clock as the active
edge. The clock_edge parameter defaults to the value 1’b0.