Heading3 - vhdl instantiation template, Vhdl instantiation template – Achronix Speedster22i User Macro Guide User Manual

Page 59

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I/O Cells

OPAD_DIFFD2

Speedster Macro Cell Library

www.achronix.com

PAGE 42

VHDL Instantiation Template

------------- ACHRONIX LIBRARY ------------
library speedster22i;
use speedster22i.components.all;
------------- DONE ACHRONIX LIBRARY ---------

-- Component Instantiation
OPAD_D2_instance_name : OPAD_D2
generic map (locationp => ““,
locationn => “”,
iostandard => “LVCMOS18”,
drive => "16",
rstmode => “async”,
rstvalue => “low”,
slew => “slow”,
invert_out => “off”,
open_drain => "false",
pvt_comp => "none)

port map (pad => user_pad,
dina => user_dina,
dinb => user_dinb,
rstn => user_rstn,
srstn => user_srstn,
clk => user_clk);

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