Achronix Speedster22i User Macro Guide - Manual (Page 47)

I/O Cells OPAD_D
Speedster Macro Cell Library www.achronix.com PAGE 30
Table 1-34: Parameters
Parameter Defined Values Default Value
location
iostandard “LVCMOS18”
drive
rstmode
rstvalue
slew
open_drain “true”, “false” “false”
pvt_comp “none”, “own” “none”
Table 1-35: Output Function Table (rstmode = “async”)
din data_en rstn clk pad
Table 1-36: Output Function Table (rstmode = “sync”)
din data_en rstn clk pad
Verilog Instantiation Template
OPAD_D #(.location(""),
.iostandard("LVCMOS18"),
.drive("16"),
.rstmode("async"),
.rstvalue("low"),
.slew("slow"),
.open_drain("false"),
.pvt_comp("none"))
instance_name (.pad(user_pad), .din(user_din), .data_en(user_data_en),
.rstn(user_rstn), .clk(user_clk));
“<pad_location>” ““
See Table 1‐1
"2", "4", "6", "8", "12", "16" "16"
“sync”, “async” “async”
“low”, “high” “low”
“fast”, “slow” “slow”
0 1 1

0
1 1 1

1
0 1 1

0
1 1 1

1