Table - table 1-43: parameters, Heading3 - verilog instantiation template – Achronix Speedster22i User Macro Guide User Manual
Page 55
I/O Cells
OPAD_DIFFD
Speedster Macro Cell Library
PAGE 38
Table 1-43: Parameters
Parameter
Defined Values
Default Value
locationp
locationn
iostandard
“LVDS”
drive
rstmode
rstvalue
slew
open_drain
“true”, “false”
“false”
pvt_comp
“none”, “own”
“none”
invert_out
“off”, ”on”
“off”
Table 1-44: Output Function Table (rstmode = “async”)
din
data_en
oe
rstn
clk
pad
padn
Table 1-45: Output Function Table (rstmode = “sync”)
din
data_en
oe
rstn
clk
pad
padn
Verilog Instantiation Template
IOPAD_DIFFD #(.locationp(""),
.locationn(""),
.iostandard("LVDS"),
.drive("16"),
.rstmode("async"),
.rstvalue("low"),
.slew("slow"),
.invert_out("off"),
.open_drain("false"),
.pvt_comp("none"))
instance_name (.pad(user_pad), .padn(user_padn)
.din(user_din), .oe(user_oe), .data_en(user_data_en),
.rstn(user_rstn), .clk(user_clk));
“<pad_location>”
““
“<pad_location>”
““
See
"2", "4", "6", "8", "12", "16"
"16"
“sync”, “async”
“async”
“low”, “high”
“low”
“fast”, “slow”
“slow”
X
X
X
0
X
Z
Z
X
0
X
1
Hold previous data
Hold previous data
X
1
0
1
Z
Z
0
1
1
1
0
1
1
1
1
1
1
0
X
1
0
1
Z
Z
X
X
X
0
Z
Z
X
0
X
1
Hold previous data
Hold previous data
X
1
0
1
Z
Z
0
1
1
1
0
1
1
1
1
1
1
0
X
1
0
1
Z
Z