Achronix Speedster22i User Macro Guide - Manual (Page 173)

Memories LRAM640
Speedster22i Macro Cell Library Achronix Semiconductor Proprietary PAGE 156
LRAM640
640-bit (64x10) Simple-Dual-Port Memory
LRAM640
rdaddr[5:0]
dout[9:0]
rdclk
wraddr[5:0]
din[9:0]
wren
wclk
rstregn
outregce
Figure 6-29: Logic Symbol
The Logic RAM (LRAM640) implements a 640‐bit memory block with one write port and one
read port. The LRAM640 can be configured as either a 64x10 simple dual‐port (1 write port, 1
read port) RAM or a 64x10 single port (1 read/write port) RAM. The LRAM640 has a
synchronous write port. The read port can be configured for either asynchronous or
synchronous read operations. This memory block is distributed in the FPGA fabric occupying
roughly five percent of the Reconfigurable Logic Blocks.
Figure 6-30: LRAM640 Block Diagram
Register Register
rdclk
wraddr[5:0]
din[9:0]
wren
rstregn
dout[9:0]
outregce
rdaddr[5:0]
wrclk
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