Achronix Speedster22i User Macro Guide - Manual (Page 176)

Memories LRAM640
Speedster22i Macro Cell Library Achronix Semiconductor Proprietary PAGE 159
Simultaneous Memory Operations
Memory operations may be performed simultaneously from both sides of the memory,
however there is a restriction with memory collisions. A memory collision is defined as the
condition where both of the ports access the same memory address within the same clock
cycle (both ports connected to the same clock), or within a TBD ps window (if each port is
connected to a different clock). The definition of a memory collision depends on whether or
not the Read Port Output Register is enabled.
If the Read Port Output Register in not enabled (reg_dout = 1’b0), a memory collision is
defined by reading the same address the cycle after a write command has occurred. If the
Read Port Output Reigister is enabled (reg_dout = 1’b1), a memory collision is defined by
reading the same address two cycle after a write command has occurred. If a memory
collision occurs, the write to the memory is valid, but the read data may be incorrect.
LRAM640 Memory Initialization
By default, the contents of the LRAM640 memory are undefined. If the user wants the initial
contents to be defined, he may assign them from either a file pointed to by the mem_init_file
parameter or assign them from the value of the mem_init parameter.
The memory is organized as little‐endian with bit 0 mapped to bit zero of parameter mem_init
and bit 639 mapped to bit 639 of parameter mem_init.
The LRAM640 memory block may alternatively be initialized with a memory file by setting
the mem_init_file to point to the path of a memory initialization file. The file format in the
latter case is defined by hexadecimal entries separated by white space, where the white space
is defined by spaces or line separation. Each number is written as an 8‐bit hexadecimal
number. Commenting is allowed following a double‐slash (//) through to the end of the line.
C‐like commenting is also allowed where the characters between the /* and */ are ignored.
The
memory is initialized starting with the first entry of the file initializing the memory array
starting with address zero, moving upward. Each line consists as the number itself
represented as a hexadecimal number.