Altera Arria 10 Avalon-ST User Manual
Page 189
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Figure 12-2: PCI Express Design Using Relaxed Ordering
Root
Complex
PCIe
Endpoint
Switch
Write Buffer
Full
CPU
Memory
PCIe Bridge to
PCI or PCI-X
Legacy
Endpoint
PCIe
Endpoint
PCIe
Endpoint
PCI/PCI-X
Blocked by
Full WR Buffer
Posted
Write
Completion
for Memory
Read
5. If your analysis indicates that you can enable relaxed ordering, simulate your system with and without
relaxed ordering enabled. Compare the results and performance.
6. If relaxed ordering improves performance without introducing errors, you can enable it in your
system.
UG-01145_avst
2015.05.04
Using Relaxed Ordering
12-11
Transaction Layer Protocol (TLP) Details
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