2 asp sample rate, 3 asp sclk source equals mclk, 13 asp master mode clocking control (address 0fh) – Cirrus Logic CS42L73 User Manual

Page 90: 1 asp master/slave mode, 2 asp master mode clock control dividers, Asp master mode clock control dividers” on, P 90, Asp master/slave mode, Cs42l73

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2 asp sample rate, 3 asp sclk source equals mclk, 13 asp master mode clocking control (address 0fh) | 1 asp master/slave mode, 2 asp master mode clock control dividers, Asp master mode clock control dividers” on, P 90, Asp master/slave mode, Cs42l73 | Cirrus Logic CS42L73 User Manual | Page 90 / 139 2 asp sample rate, 3 asp sclk source equals mclk, 13 asp master mode clocking control (address 0fh) | 1 asp master/slave mode, 2 asp master mode clock control dividers, Asp master mode clock control dividers” on, P 90, Asp master/slave mode, Cs42l73 | Cirrus Logic CS42L73 User Manual | Page 90 / 139
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