Cirrus Logic CS42L73 - Manual (Page 62)

62 DS882F1
CS42L73
0
1
2
 Attenuation +
Attenuation
3
0
1
2
Attenuation
3
+
Attenuation
Attenuation
Attenuation
Attenuation
Attenuation
0
1
2
 Attenuation +
Attenuation
3
0
1
2
Attenuation
Attenuation
3
+
Attenuation
Attenuation
Attenuation
Attenuation
Stereo
Headphone /
Line Output
(HL)
Output Path
Audio
Serial Port (ASP),
Stereo Input
(via ASRC)
Voice
Serial Port (VSP),
Mono Input
(via ASRC)
Audio
Serial Port (ASP),
Stereo Output
(via ASRC)
Voice
Serial Port (VSP),
Stereo Output
(via ASRC)
Left
Right
Left
Right
VSPO_STEREO
Left
Right
0
0
Mo
no
Mi
x
3
1 1 0 0
M
ono M
ix
-6 dB
-6 dB
+
Right Lef
t
Right Lef
t
Right Lef
t
Mono
Speakerphone (SPK)
[Speakerphone Left]
Output Path
Mono
Ear Speaker /
Speakerphone Line
(ESL)
[Speakerphone Right]
Output Path
Auxiliary
Serial Port (XSP),
Stereo Input
(via ASRC)
3
SPK_XSP_SEL[1:0]
0
1
2
Attenuation
Attenuation
3
+
Attenuation
Attenuation
0
1
2
 Attenuation +
Attenuation
3
0
1
2
Attenuation
Attenuation
3
+
Attenuation
Attenuation
Attenuation
Attenuation
Auxiliary
Serial Port (XSP),
Stereo Output
(via ASRC)
XSPO_STEREO
Mo
no
Mi
x
1 1 0 0
Right Lef
t
Right Lef
t
0
1
2
 Attenuation +
Attenuation
3
0
1
2
Attenuation
Attenuation
3
+
Attenuation
Attenuation
Attenuation
Attenuation
-6 dB
-6 dB
00
01
1x
00
01
1x
SPK_ASP_SEL[1:0]
ESL_XSP_SEL[1:0]
0
1
2
Attenuation
Attenuation
3
+
Attenuation
Attenuation
00
01
1x
00
01
1x
ESL_ASP_SEL[1:0]
-6 dB
-6 dB
Lef
t
Right
M
ono M
ix
Le
ft
Right
M
ono M
ix
M
ono
2
2
1
1
Stereo
Input Path (IP)
(Originating from
ADCs / Digital MICs)
+
+
+ +
Figure 32. Digital Mixer Diagram
Refer to section
“Input Paths” on
page 59
Refer to sections “Serial Ports” on page 51 and “Asyn-
chronous Sample Rate Converters (ASRCs)” on page 59