Cirrus Logic CS42L73 - Manual (Page 5)

DS882F1 5
CS42L73
4.11.2 Mixer Input Attenuation Adjustment .................................................................................... 63
4.11.3 Powered-Down Mixer Inputs ............................................................................................... 64
4.11.4 Avoiding Mixer Clipping ....................................................................................................... 64
4.11.5 Mixer Attenuation Values .................................................................................................... 65
4.12 Recommended Operating Procedures ........................................................................................ 65
4.12.1 Initial Power-Up Sequence .................................................................................................. 65
4.12.2 Power-Up Sequence (xSP to HP/LO) ................................................................................. 66
4.12.3 Power-Down Sequence (xSP to HP/LO) ............................................................................. 67
4.12.4 Recommended Sequence for Modification of the MCLK Signal ......................................... 67
4.12.5 Microphone Enabling/Switching Sequence ......................................................................... 68
4.12.6 Final Power-Down Sequence .............................................................................................. 68
4.13 Using MIC2_SDET as Headphone Plug Detect ........................................................................... 69
4.14 Headphone Plug Detect and Mic Short Detect ............................................................................ 70
4.15 Interrupts ...................................................................................................................................... 70
4.16 Control Port Operation ................................................................................................................. 71
4.16.1 I²C Control ........................................................................................................................... 71
4.17 Fast Start Mode ........................................................................................................................... 73
4.18 Headphone High-Impedance Mode ............................................................................................. 75
5. REGISTER QUICK REFERENCE ........................................................................................................ 76
6. REGISTER DESCRIPTION .................................................................................................................. 81
6.1 Fast Mode Enable (Address 00h) .................................................................................................. 81
6.1.1 Test Bits ................................................................................................................................ 81
6.2 Device ID A and B (Address 01h), C and D (Address 02h), and E (Address 03h) (Read Only) . 81
6.2.1 Device I.D. (Read Only) ........................................................................................................ 81
6.3 Revision ID (Address 05h) (Read Only) ......................................................................................... 81
6.3.1 Alpha Revision (Read Only) .................................................................................................. 81
6.3.2 Metal Revision (Read Only) .................................................................................................. 81
6.4 Power Control 1 (Address 06h) ...................................................................................................... 82
6.4.1 Power Down ADC x ............................................................................................................... 82
6.4.2 Power Down Digital Mic x ...................................................................................................... 82
6.4.3 Discharge Filt+ Capacitor ...................................................................................................... 82
6.4.4 Power Down Device .............................................................................................................. 82
6.5 Power Control 2 (Address 07h) ...................................................................................................... 83
6.5.1 Power Down MICx Bias ......................................................................................................... 83
6.5.2 Power Down VSP .................................................................................................................. 83
6.5.3 Power Down ASP SDOUT Path ............................................................................................ 83
6.5.4 Power Down ASP SDIN Path ................................................................................................ 83
6.5.5 Power Down XSP SDOUT Path ............................................................................................ 83
6.5.6 Power Down XSP SDIN Path ................................................................................................ 83
6.6 Power Control 3 and Thermal Overload Threshold Control (Address 08h) ................................... 84
6.6.1 Thermal Overload Threshold Settings ................................................................................... 84
6.6.2 Power Down Thermal Sense ................................................................................................. 84
6.6.3 Power Down Speakerphone Line Output .............................................................................. 84
6.6.4 Power Down Ear Speaker ..................................................................................................... 84
6.6.5 Power Down Speakerphone .................................................................................................. 84
6.6.6 Power Down Line Output ...................................................................................................... 85
6.6.7 Power Down Headphone ...................................................................................................... 85
6.7 Charge Pump Frequency and Class H Configuration (Address 09h) ............................................ 85
6.7.1 Charge Pump Frequency ...................................................................................................... 85
6.7.2 Adaptive Power Adjustment .................................................................................................. 85
6.8 Output Load, Mic Bias, and MIC2 Short Detect Configuration (Address 0Ah) ............................... 86
6.8.1 VP Supply Minimum Voltage Setting ..................................................................................... 86
6.8.2 Speakerphone Light Load Mode Enable ............................................................................... 86
6.8.3 Mic Bias Output Control ........................................................................................................ 86