Cirrus Logic CS42L73 - Manual (Page 3)

DS882F1 3
CS42L73
General Description
The CS42L73 is a highly integrated, low-power, audio and telephony CODEC for portable applications such as
smartphones and ultramobile personal computers.
The CS42L73 features a flexible clocking architecture, allowing the device to use reference clock frequencies of
6, 12, 24, 13, 26, 19.2, or 38.4 MHz, or any standard audio master clock. As many as two reference/master clock
sources may be connected; either one can be selected to drive the internal clocks and processing rate of the
CS42L73. Thus, multiple master clock sources within a system can be dynamically activated and deactivated to
minimize system-level power consumption.
Three asynchronous bidirectional serial ports (auxiliary, audio, and voice serial ports (XSP, ASP, and VSP,
respectively) support multiple clock domains of various digital audio sources or destinations. Three low-latency,
fast-locking, integrated high-performance asynchronous sample rate converters synchronize and convert the
audio samples to the internal processing rate of the CS42L73.
A stereo line input or two mono (one stereo) mic inputs are routed to a stereo ADC. The mic inputs may be
selectively preamplified by +10 or +20 dB. Two independent, low-noise mic bias voltage supplies are also provided.
A PGA is applied to the inputs before they reach the ADC.
The stereo input path that follows the stereo ADC begins with a multiplexer to selectively choose data from a
digital mic interface. Following the multiplexer, the data is decimated, selectively DC high-pass filtered,
channel-swapped or mono-to-stereo routed (fanned-out), and volume adjusted or muted. The volume levels can be
automatically adjusted via a programmable ALC and noise gate.
A digital mixer is used to mix and route the CS42L73’s inputs (analog inputs to ADC, digital mic, or serial ports) to
outputs (DAC-fed amplifiers or serial ports). There is independent attenuation on each mixer input for each output.
The processing along the output paths from the digital mixer to the two stereo DACs includes volume adjustment
and mute control. A peak-detector can be used to automatically adjust the volume levels via a programmable limiter.
The first stereo DAC feeds the stereo headphone and line output amplifiers, which are powered from a dedicated
positive supply. An integrated charge pump provides a negative supply. This allows a ground-centered analog
output with a wide signal swing, and eliminates external DC-blocking capacitors while reducing pops and clicks.
Tri-level Class H amplification is used to reduce power consumption under low-signal-level conditions. Analog
volume controls are provided on the stereo headphone and line outputs.
The second stereo DAC feeds several mono outputs. The left channel of the DAC sources a mono,
differential-drive, speakerphone amplifier for driving the handset speakerphone. The right channel sources a
mono, differential-drive, earphone amplifier for driving the handset earphone. The right channel is also routed to
a mono, differential-drive, speakerphone line output, which may be connected to an external amplifier to
implement a stereo speakerphone configuration when it is used in conjunction with the integrated speakerphone
amplifier.
The CS42L73 implements robust power management to achieve ultralow power consumption. High granularity in
power-down controls allows individual functional blocks to be powered down when unused. The internal low-dropout
regulator (LDO) saves power by running the internal digital circuits at half the logic interface supply voltage (VL/2).
A high-speed I 2 C control port interface capable of up to 400 kHz operation facilitates register programming.
The CS42L73 is available in space-saving 64-ball WLCSP and 65-ball FBGA packages for the commercial (-40° to
+85° C) grade.