Cirrus Logic CS42L73 - Manual (Page 12)

12 DS882F1
CS42L73
1. PACKAGE PIN/BALL ASSIGNMENTS AND CONFIGURATIONS
1.1 64-Ball Wafer-Level Chip Scale Package (WLCSP)
Top-Down
(Though Package)
View
H5
SPK_VQ
XSP_SDIN
DGND
B5
LINEINA
A5
MIC1
H6
HPOUTA
-VCP_FILT
XSP_SCLK
B6
ASP_LRCK
A6
XSP_SDOUT
H1 H2
B1 B2
A1 A2
H3 H4
VA
EAROUT-
B3 B4
LINEIN_REF
A3
LINEINB
A4
H7 H8
VL
B7
ASP_SDOUT
B8
A7
MCLK1
A8
ASP_SDIN
VD_FILT
Ball A1 Location Indicator
VP HPOUTB
DMIC_SCLK
PGND
C5
MIC2
C6
XSP_LRCK
DMIC_SD
C1 C2 C3 C4
MIC1_REF
VSP_SDOUT
C7
ASP_SCLK
C8
VSP_SDIN
SCL
D5
MICB_FILT
D6
THERM
D1 D2 D3 D4
MIC2_REF
VSP_SCLK
D7
MCLK2
D8
VSP_LRCK
E5
ANA_VQ
E6
THERM
THERM
E1 E2 E3 E4
MIC2_BIAS
VCP
E7 E8
FLYP
F5
FILT+
F6
LINEOUTB
SPKLINEO+
F1 F2 F3 F4
+VCP_FILT
F7
LINEOUTA
F8
FLYC
SPKLINEO-
G5
AGND
G6
LINEO_REF
SPKOUT+
G1 G2 G3 G4
EAROUT+
CPGND
G7
HPOUT_REF
G8
FLYN
SPKOUT-
SDA
INT
THERM
RESET
MIC2_SDET
MIC1_BIAS
VA I/O VL I/O VP I/O
VCP I/O Ground