Cirrus Logic CS42L73 - Manual (Page 17)

DS882F1 17
CS42L73
2. TYPICAL CONNECTION DIAGRAM
Note 13
Optional
Bias Res.
Note 9
Note 4
DGND
VL
SCL
SDA
R P
ASP_LRCK
Applications
Processor
ASP_SCLK
ASP_SDIN
ASP_SDOUT
CS42L73
MIC2_BIAS
Line Level Out
Left & Right
SPKOUT+
SPKOUT-
MIC2
MIC2_REF
2.2 µF
SPK_VQ
AGND
2.2 µF FILT+
EAROUT+
EAROUT-
VP VBAT
LINEINA
Line In
Left
100 k 
LINEINB
Line In
Right
100 k 
0.1 µF 4.7 µF
Note 2
2.2 µF
Note 1
+VCP_FILT
FLYC
FLYN
-VCP_FILT
2.2 µF
2.2 µF
VCP
VANA
FLYP
2.2 µF
HPOUTB
HPOUTA
100  33 nF
HPOUT_REF
LINEOUTB
LINEOUTA
LINEIN_REF
C INA
VSP_LRCK
Baseband
Processor
MCLK1
VSP_SCLK
VSP_SDIN
VSP_SDOUT
2.2 µF
VD_FILT
1.0 µF
LINEO_REF
CPGND
C INA
C INA
PGND
MIC1_BIAS
MIC1
MIC1_REF
R P
ANA_VQ
4.7 µF
INT
RESET
C INM
C INM
Note 7
1 µF
C
INM
C INM Note 7
Note 8
Headphone Out
Left & Right 100  33 nF
Speakerphone
(Left)
Ear Speaker
(Receiver)
Note 6
+
+
+
+
+
**
**
**
**
**
**
**
*
*
*
*
* * *
*
*
Note 5
R I_P
3300 pF
562 
562 
3300 pF
Note 10
Optional
LPF
Ground Ring
+ +
***
***
Note 4
Note 3
0.1 µF
*
Note 11
Note 12
MCLK2
DMIC_SD
DMIC_SCLK
SPKLINEO+
SPKLINEO-
XSP_LRCK
XSP_SCLK
XSP_SDIN
XSP_SDOUT
MICB_FILT
Note 4
4.7 µF
+
*!*
R BIAS
Note 9
Headset
Microphone
Handset
Microphone
Note 9
1 µF
Note 8
Note 6
R BIAS
MIC2_SDET
Speakerphone
(Right)
L/R
DATA
L/R
DATA
Bluetooth
Transceiver
Cellular
Voice
SP
AEC
SP
Right/Data2
Digital
Microphone
Left/Data1
Digital
Microphone
VANA
VA
0.1 µF
*
PMU
USB
+5 V
VBAT
LDO
Switching
Regulator
Reset
Generator
+1.8 V
+1.8 V VDIG
VDIG
VBAT
*
*
Class-D
CS35L0x
+
*!*
+
Notes:
1. The headphone amplifier’s output power and distortion are rated using the nominal capacitance shown.
Larger capacitance reduces the ripple on the internal amplifiers’ supplies and in turn reduces the amplifier’s
distortion at high output power levels. Smaller capacitance may not sufficiently reduce ripple to achieve the
rated output power and distortion. Since the actual value of typical X7R/X5R ceramic capacitors deviates from
the nominal value by a percentage specified in the manufacturer’s data sheet, capacitors should be selected
based on the minimum output power and maximum distortion required.
2. The headphone amplifier’s output power and distortion are rated using the nominal capacitance shown and
using the default charge pump switching frequency. The required capacitance follows an inverse relationship
with the charge pump’s switching frequency. When increasing the switching frequency, the capacitance may
decrease; when lowering the switching frequency, the capacitance must increase. Since the actual value of
typical X7R/X5R ceramic capacitors deviates from the nominal value by a percentage specified in the
manufacturer’s data sheet, capacitors should be selected based on the minimum output power, maximum
distortion and maximum charge pump switching frequency required.
3. Lowering the capacitance below the value shown will affect PSRR, ADC-DAC isolation and intermodulation,
interchannel isolation and intermodulation and THD+N performance.
4. Additional bulk capacitance may be added to improve PSRR at low frequencies.
5. Series resistance in the path of the power supplies must be avoided. Any voltage drop on VCP directly affects
the negative charge pump supply (-VHPFILT) and clips the audio output.
6. The mic cartridge dictates the value of R
BIAS , a bias resistor used with electret condenser microphones.
7. The reference terminal of the MICx inputs connects to the ground pin of the microphone cartridge. Gain is
applied only to the positive terminal.
8. The MICx_BIAS compensation capacitor must be 1 uF or greater. The capacitor’s ground terminal should be
connected to the same ground point as the MICx_REF ground connection.
9. Analog signal inputs (MICx & MICx_REF or LINEINx & LINEIN_REF) should be left floating if unused.
10. An optional passive Low Pass Filter (LPF) may be used to reduce quantization noise.
11. If tantalum capacitor use is desired, 2 tantalum capacitors of value 2x C
INM
, configured in series with both
anodes or both cathodes connected, must be used to avoid potentially damaging reverse voltages across the
tantalum capacitors.
12. If unused, tie MIC2_SDET to VP.
13. Optional bias besistors are used to minimize disturbances on the line inputs if their a/c coupling capacitors are
left floating and then reconnected to signal (e.g. when the Line Input signal comes from a connector that is not
always present). If the Line Input signal is always present, the Bias Resistors are not required.
Key for Capacitor Types Required:
* Use low ESR, X7R/X5R capacitors
** Use low ESR, X7R/X5R capacitors, or,
if improved microphonic performance is
required, use tantalum capacitors with
equal or exceeding characteristics
*** Use NPO/C0G capacitors
*!* Use low ESR, X7R/X5R capacitors, or,
if derating factors reduce the effective
capacitance significantly, use tantalum
capacitors with equal or exceeding
characteristics
If no type symbol is shown next to a capacitor,
any type may be used.
Note, one should be mindful of ceramic
capacitor de-rating factors (e.g. percentage
the effective value reduced when d/c or small
a/c voltages are applied) when selecting
capacitor type, brand, and size.
Figure 1. Typical Connection Diagram
Other Notes:
All external passive component values shown
are nominal values.
R
P_I
and R
P
values are defined in section
“Digital Interface Specifications and Charac-
teristics” on page 35
.
For the spec. values listed in section “Charac-
teristic and Specifications” on page 19 , a val-
ue of 1 F is used for C
INA
and a value of 0.1
F is used for C
INM
.
As required, add protection circuitry to ensure
compliance with the
Absolute Maximum Rat-
ings found on page 20 .
®