Figure 3, Refer to, Figure 2 – Cirrus Logic CS42L73 User Manual
Page 24: Figure 4
24
DS882F1
CS42L73
STEREO-ADC AND DUAL-DIGITAL-MIC DIGITAL FILTER
CHARACTERISTICS
Test Conditions (unless otherwise specified): Fs = 48 kHz
, f
DMIC_SCLK
= 3.072 MHz
.
Notes:
19. Refer to section
“Digital Microphone (DMIC) Interface” on page 60
for a description of how the digital mic shift clock
frequency (f
DMIC_SCLK
) relates to the CS42L73‘s internal master clock rate.
20. Responses are clock-dependent and will scale with Fs. Note that the response plots (Figures
to
on pages
and
) have been normalized to Fs and can be denormalized by multiplying the X-axis scale by Fs.
21. Measurement Bandwidth is from Stopband to 3 Fs.
22. High-pass filter is applied after low-pass filter.
Parameters
Min
Typ
Max
Units
Low-Pass Filter Characteristics
Frequency Response (20 Hz to 20 kHz)
-0.07
-
+0.02
dB
Passband
to -0.05 dB corner
to -3.0 dB corner
-
-
0.41
0.49
-
-
Fs
Fs
0.60
-
-
Fs
Stopband Attenuation
33
-
-
dB
Total Input Path Digital Filter Group Delay
-
4.3/Fs
-
s
High-Pass Filter Characteristics
Passband
to -3.0 dB corner
to -0.05 dB corner
-
-
4.10x10
-5
3.57x10
-4
-
-
Fs
Fs
Passband Ripple
-
-
0.01
dB
Phase Deviation @ 20 Hz
-
5.30
-
Deg
Filter Settling Time (input signal goes to 95% of its final value)
-
12.2x10
3
/Fs
-
s
-60 dBFS,
1 kHz
0.1 µF
MICx
MICx_REF
100
MICx_BIAS
2.21 k
0.1 µF
100
2.21 k
1.0 µF
Figure 2. MICx Dynamic Range Test Configuration
100 mV
PP
,
25 Hz
100
1
F
LINEINx or
MICy
LINEINx_REF
or MICy_REF
Figure 3. Analog Input CMRR Test Setup
0.1 µF
LINEINx or MICx
LINEIN_REF or MICx_REF
100
300 mV
PP,
1 kHz
0.1 µF
100
Figure 4. LINEIN_REF/MICx_REF Input Voltage Test Setup