Cirrus Logic CS42L73 User Manual
Page 35
DS882F1
35
CS42L73
DIGITAL INTERFACE SPECIFICATIONS AND CHARACTERISTICS
Test Conditions (unless otherwise specified): Connections to the CS42L73 are shown in the
“Typical Connection Diagram” on
; GND = AGND = PGND = CPGND = DGND = 0 V; all voltages are with respect to ground (GND); VA = VL = 1.80 V, VP
= 3.70 V; T
A
= +25
C.
Notes:
49. Specification is per pin.
50. Specification includes current through internal pull up/down resistors, where applicable (as defined in section
Pin/Ball I/O Configurations” on page 16
).
51. The minimum values of the pull-up resistors R
P
and R
P_I
(as shown in the
“Typical Connection Diagram” on page 17
and specified in
“Digital Interface Specifications and Characteristics” on page 35
) are determined using the maximum
level of VL, the minimum sink current strength of their respective output, and the maximum low-level output voltage (V
OL
in
“Digital Interface Specifications and Characteristics” on page 35
P
and R
P_I
may be de-
termined by the how fast their associated signals must transition (e.g., the lower the value of R
P
, the faster the I²C bus
will be able to operate for a given bus load capacitance). Refer to
“Switching Specifications—Control Port” on page 40
and to the I²C bus specification (see section
) for more details.
Parameters
Symbol Min Max
Units
Input Leakage Current
Inputs with pull-up/downs
Inputs without pull-up/downs
I
in
-
-
±4000
±800
nA
nA
Input Capacitance
-
-
10
pF
SDA Pull-up Resistance
R
P
500
-
R
P_I
2
-
k
Logic I/Os
High-Level Output Voltage (I
OH
= -100
A)
V
OH
VL – 0.2
-
V
Low-Level Output Voltage
All outputs (I
OL
= 100
A)
SDA and INT (I
OL
as per R
P(min)
and R
P_I(min)
V
OL
-
-
0.2
0.2•VL
V
V
High-Level Input Voltage
V
IH
0.70•VL
-
V
Low-Level Input Voltage
V
IL
-
0.30•VL
V
MIC2_SDET Input
High-Level Input Voltage
V
IH-SD
0.55
-
V
Low-Level Input Voltage
V
IL-SD
-
0.35
V