17 fast start mode, Table 13. start up times, Cs42l73 – Cirrus Logic CS42L73 User Manual
Page 73
DS882F1
73
CS42L73
If a read address different from that which is based on the last received MAP address is desired, an abort-
ed write operation can be used as a preamble that sets the desired read address. This preamble tech-
nique is illustrated in
. In the figure, a write operation is aborted (after the acknowledge for the
MAP byte) by sending a stop condition.
The following pseudocode illustrates an aborted write operation followed by a single read operation. For
multiple read operations, autoincrement would be set on (as is shown in
Send start condition.
Send 10010100 (chip address and write operation).
Receive acknowledge bit.
Send MAP byte, autoincrement off.
Receive acknowledge bit.
Send stop condition, aborting write.
Send start condition.
Send 10010101 (chip address and read operation).
Receive acknowledge bit.
Receive byte, contents of selected register.
Send acknowledge bit.
Send stop condition.
4.17 Fast Start Mode
Using fast start mode can reduce the transition time from a low power state to producing audio in the default
power-up sequence (
“Power-Up Sequence (xSP to HP/LO)” on page 66
) to meet stricter requirements. See
for typical power up times for normal mode and fast start mode. See
for setup conditions.
Also, a system may want the CS42L73 to be in a low power state but still needs the MIC2_SDET micro-
phone button short detection to function as a system wake feature. In this case, reducing the MCLK frequen-
cy will help to lower the power consumption without affecting audio performance since all of the ADCs and
DACs are powered down. To support this power state, fast start mode needs to be enabled to properly de-
tect microphone button presses with a slow MCLK frequency.
Table 13. Start Up Times
Output Path
Normal Mode
Fast Start Mode
Unit
HPOUT/LINEOUT
70
30
ms
EAR SPKOUT
46
35
ms
SPKOUT/SPKLINEOUT
140
45
ms
SCL
CHIP ADDRESS (WRITE)
MAP BYTE
DATA
START
ACK
STOP
ACK
ACK
ACK
SDA
7 0
7 0
CHIP ADDRESS (READ)
START
7 6 5 4 3 2 1 0
7 0
NO
16
8 9
12 13 14 15
4 5 6 7
0 1
20 21 22 23 24
26 27 28
2 3
10 11
17 18 19
25
ACK
STOP
MAP Addr = Z
IN
CR =
1
Slave Addr = 1001010
7 6 5 4 3 2 1 0
R/
W =
0
Slave Addr = 1001010
7 6 5 4 3 2 1 0
R/
W =
1
DATA
DATA
Data f
rom Addr Z
Data fr
om Addr Z+1
Data fr
om Addr Z+n
SDA
Source
Master
Master
Master
Pullup
Slave
Slave
Slave
Slave
Slave
Master
Master
Master
Pullup
Figure 39. Control Port Timing, I²C Reads with Preamble and Autoincrement