Cirrus Logic CS42L73 - Manual (Page 47)

DS882F1 47
CS42L73
When the charge pump transitions from the higher set of rail voltages to the lower set, there is a 2-second
delay before the charge pump supplies the lower rail voltages to the amplifiers. This hysteresis ensures
that the charge pump does not toggle between the two rail voltages as signals approach the clip threshold.
It also prevents clipping in the instance of repetitive high-level transients in the input signal. The timing
diagram of ±VCP/2 to/from ±VCP for this transitional behavior is detailed in
Figure 20 .
+VCP
+VCP
2
Ideal Transition
Actual Transition caused
by +VCP_FILT Capacitor
Time
+VCP
3
-VCP
-VCP
2
-VCP
3
Figure 19. VCP_FILT Transitions