Cirrus Logic CS42L73 - Manual (Page 49)

DS882F1 49
CS42L73
4.5.3 Efficiency
As discussed in previous sections, the HPOUTx and LINEOUTx amplifiers may operate from one of three
pairs of rail voltages based on the amplitude of the output signal or the relevant volume settings in the
signal path.
Figure 21 shows total power drawn by the device vs. power delivered to two headphone loads
when the rails are held constant at each of the three available settings, or when the Class H controller is
set to Adapt-to-Volume mode.
Note: Test Conditions: VCP = VL = VA = 1.8 V, VP = 5 V; MCLK = 6 MHz, LRCK = 44.118 kHz; full-scale
input signal applied through HPOUTA and HPOUTB.
If rail voltages are set to ±VCP Mode, the output amplifiers operate in their least-efficient mode for low-lev-
el signals. When rail voltages are held at ±VCP/2 or ±VCP/3, the amplifiers operate in a more efficient
mode, but clip when amplifying a full-scale signal.
The blue trace in Figure 21 shows the benefit of the Tri-Modal Class H design. At lower output levels, the
output of the amplifiers is represented by the ±VCP/3 or ±VCP/2 curves, depending on the signal level.
At higher output levels, the output is represented by the ±VCP curve. The duration in which the amplifiers
operate within any of the three rail pairs (±VCP/3, ±VCP/2, or ±VCP) depends on both the content and
the output level of the program material being amplified. The highest efficiency results from maintaining
an output level that is close to, but does not exceed, the clip threshold of a particular supply curve.
4.6 DAC Limiter
When enabled, the limiter monitors the digital input signal before the DAC modulators, detects when levels
exceed the maximum threshold settings and lowers the volume at a programmable attack rate below the
0.001 0.01 0.1 1 10
0
10
20
30
40
50
60
70
80
90
Power Delivered to Two 30  Loads (mW)
Po
w
er
T
ak
en
F
ro
m
Al
l Su
pp
lie
s (
m
W
)
 VCP/3 Mode
 VCP/2 Mode
 VCP Mode
Class H Enabled
Figure 21. Input Power vs. Output Power