Rockwell Automation DAG6.5.8 APPLICATION GUIDE SCADA SYSTEM User Manual

Page 388

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Publication AG-UM008C-EN-P - February 2005

E-6 Sample Ladder Logic

SLC DF1 Half-Duplex Slave and DF1 Radio Modem Report-by-Exception MSG

SLC DF1 Half-Duplex Slave "Report-By-Exception" MSG Logic

Copy all of the "live" discrete and analog values to be written as a "report-by-exception" MSG to the SLC Master into a data compare buffer, which is a contiguous block of words starting in
B3:0. This copying occurs continuously between successful MSG writes. If multiple changes occur after the MSG begins executing, and before the MSG has successfully completed, only
the last change will be recorded and sent during the next MSG execution. Care should be exercised with constantly changing analog data so that the MSG doesn't continously retrigger, thus
negating the efficiencies of a "report-by-exception" scheme. In this example, the SLC real time clock values (S:37 to 42) will be sent immediately upon any change of year, month, day, hour
or minute, or every15 seconds, whichever occurs first.

0000

N7:90

13

MSG
Done

COP

Copy File
Source

#S2:37

Dest

#B3:0

Length

6

COP

Data Compare Buffer

EN

DN

TON

Timer On Delay
Timer

T4:0

Time Base

1.0

Preset

15<

Accum

0<

TON

Max Delay Before
Retriggering MSG

If 15 seconds have elapsed since the last successful completion of the MSG write, snapshot the current data values for writing to the Master and retrigger the MSG (regardless of whether data
values have changed since the last write).

0001

T4:0

DN

Max
Delay

COP

Copy File
Source

#B3:0

Dest

#N7:0

Length

6

COP

MSG Write Buffer

U

N7:90

15

MSG
Enable

JMP

Q2:2

Jump to
MSG Rung

If the MSG is enabled, skip over the data comparison rungs directly to the MSG rung. If the MSG has just completed in error, retrigger the MSG immediately and jump directly to the MSG

0002

N7:90

13

MSG
Done

N7:90

12

MSG
Error

U

N7:90

15

MSG
Enable

JMP

Q2:2

Jump to
MSG Rung

The next three rungs create a data file comparison routine. This rung clears the index register (S:24) to prepare it for use in the Not Equal comparison instruction.

0003

CLR

Clear
Dest

S2:24

0<

CLR

Index Register

rung.

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