Altera ALTDLL - Manual (Page 32)

3–14 Chapter 3: Parameter Settings
ALTDQ_DQS Parameter Editor
ALTDLL and ALTDQ_DQS Megafunctions User Guide © February 2012 Altera Corporation
Table 3–7 describes options available on the DQ OUT/OE page. This page allows you
to configure the DQ output and OE paths. For more information about the DQ output
and OE paths, refer to
“DQ Output/OE Path” on page 4–10 .
Advanced DQ IPA
Options
Register DQ input
phase alignment
add phase
transfer
— DQ_IPA_ADD_PHASE_
TRANSFER_REG
If you turn on this option, a negative edge-triggered
register is added in the data path for the clock phase
transfer. If you turn off this option, no register is added.
The negative-edge register is used to guarantee the
setup and hold time for a phase transfer.
Use DQ input
delay chain — USE_DQ_INPUT_DELAY
_CHAIN
Enables <IO> _INPUT_DELAY_CHAIN (D1). This
parameter is used for deskew purposes or SSN
reduction on the DQ input path.
Not supported in Arria II GX devices.
For more information about configuring delay chains
dynamically, refer to
“Delay Chains” on page 4–15 .
Table 3–6. Options on DQ IN Page (Part 3 of 3)
Parameter Name Legal Value
Clear Box
Parameter Name Description
Table 3–7. Options on DQ OUT/OE Page (Part 1 of 2)
Parameter Name Legal Value
Clear Box
Parameter Name Description
DQ Output Path
Options
Enable DQ output
delay chain1
— USE_DQ_OUTPUT_
DELAY_CHAIN1
Enables <IO> _OUTPUT_DELAY_CHAIN1 (D5) in the
DQ output path. This parameter is used for deskew
purposes or SSN reduction. D5 is a run-time adjustable
delay chain.
For more information about configuring delay chains
dynamically, refer to
“Delay Chains” on page 4–15 .
DQ Output Path
Options
Enable DQ output
delay chain2
— USE_DQ_OUTPUT_
DELAY_CHAIN2
Enables <IO> _OUTPUT_DELAY_CHAIN2 (D6) in the
DQ output path. This parameter is used for deskew
purposes or SSN reduction. D6 is a run-time adjustable
delay chain.
For more information about configuring delay chains
dynamically, refer to
“Delay Chains” on page 4–15 .
DQ Output Path
Options
DQ output
register mode
Not used, FF,
or DDIO DQ_OUTPUT_REG_MODE Enables the full-rate DQ output registers
(<IO>
_OUTPUT_FF or <IO> _OUTPUT_DDIO_OUT
registers).
DQ Output Enable
Options
Enable DQ output
enable
— USE_DQ_OE_PATH Instantiates the DQ output enable path.
DQ Output Enable
Options
Enable DQ output
enable delay
chain1
— USE_DQ_OE_DELAY_
CHAIN1
Enables <IO> _OE_DELAY_CHAIN1 (D5) in the DQ OE
path. This parameter is used for deskew purposes or
SSN reduction. D5 is a run-time adjustable delay chain.
For more information about configuring delay chains
dynamically, refer to
“Delay Chains” on page 4–15 .