Altera ALTDLL User Manual

Page 75

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4–39

Chapter 4: Functional Description

ALTDQ_DQS Megafunction Ports

ALTDLL and ALTDQ_DQS Megafunctions User Guide

© February 2012

Altera Corporation

bidir_dq_input_data_ou

t[n

b

-1..0]

Output

Optional

This port outputs the bidirectional DQ signal from
the

BIDIR_DQ_INPUT_DELAY_CHAIN:dataout

,

BIDIR_DQ_INPUT_FF:q

, or

bidir_dq_input_data_in

port.

bidir_dq_sreset

n

b

-1..0]

Input

Optional

GND

This port is connected to all

sreset

port in the

bidirectional DQ IO primitives that is used to
synchronously reset the registers in those primitives.

dll_delayctrlin

5..0]

Input

Optional

GND

This port receives the Gray-coded delay chain setting
for the DQ read path from the

delayctrlout[5..0]

port of the ALTDLL.

dq_input_reg_clk

Input

Optional

GND

This port feeds the clock signal for the
<IO>

_INPUT_FF:clk

and <IO>

_DDIO_IN:clk

ports.

dq_input_reg_clkena

Input

Optional

V

CC

This port feeds the output enable signal for the
<IO>

_INPUT_FF:ena

and <IO>

_DDIO_IN:ena

ports.

dq_ipa_clk

Input

Optional

GND

This port feeds the clock signal for the
<IO>

_IPA_HIGH:clk

and <IO>

_IPA_LOW:clk

ports.

input_dq_areset

[n

i

-1..0]

Input

Optional

GND

This port is connected to all

areset

port in the

input DQ IO primitives that is used to
asynchronously reset the registers in those
primitives.

input_dq_hr_input_data

_out[4*n

i

-1..0]

Output

Optional

This port outputs the half-rate DDR input DQ signal
from the

INPUT_DQ_HALF_RATE_INPUT:dataout

port.

input_dq_input_data_in

[n

i

-1..0]

Input

Optional

GND

This port feeds the input DQ signal for the

INPUT_DQ_INPUT_DELAY_CHAIN:datain

,

INPUT_DQ_INPUT_FF:d

,

INPUT_DQ_DDIO_IN:datain

, or

input_dq_input_data_out

port.

input_dq_input_data_ou

t_high[n

i

-1..0]

Output

Optional

This port outputs the full-rate DDR input DQ signal
(rising edge) from the

INPUT_DQ_IPA_HIGH:dataou

t or

INPUT_DQ_DDIO_IN:regouthi

.

input_dq_input_data_ou

t_low[n

i

-1..0]

Output

Optional

This port outputs the full-rate DDR input DQ signal
(falling edge) from the

INPUT_DQ_IPA_LOW:dataout

or

INPUT_DQ_DDIO_IN:regoutlo

.

input_dq_input_data_ou

t[n

i

-1..0]

Output

Optional

This port outputs the input DQ signal from the

INPUT_DQ_INPUT_DELAY_CHAIN:dataout

,

INPUT_DQ_INPUT_FF:q

, or

input_dq_input_data_in

port.

input_dq_sreset

[n

i

-1..0]

Input

Optional

GND

This port is connected to all

sreset

ports in the

input DQ IO primitives that is used to synchronously
reset the registers in those primitives.

Table 4–15. Megafunction Ports to Configure DQ Input Path

(Part 2 of 2)

Port Name

Type

Optional/
Required

Default

Description

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