Altera ALTDLL - Manual (Page 77)

4–41 Chapter 4: Functional Description
ALTDQ_DQS Megafunction Ports
ALTDLL and ALTDQ_DQS Megafunctions User Guide © February 2012 Altera Corporation
dq_output_reg_clkena Input Optional V
CC
This port feeds the output enable signal for the
<IO>
_OUTPUT_FF:ena and
<IO> _OUTPUT_DDIO_OUT:ena ports.
output_dq_areset
[n
o
-1..0]
Input Optional GND This port is connected to all areset port in the
output DQ IO primitives that is used to
asynchronously reset the registers in those
primitives.
output_dq_hr_output_
data_in[4*n
o
-1..0]
Input Optional GND This port feeds the half-rate DDR output DQ signal
for the
OUTPUT_DQ_OUTPUT_HR_DDIO_OUT_HIGH
:datainhi / datainlo and
OUTPUT_DQ_OUTPUT_HR_DDIO_OUT_LOW:
datainhi / datainlo ports.
output_dq_output_data_
in_high[n
o
-1..0]
Input Optional GND This port feeds the full-rate DDR output DQ signal
(rising edge) for the
OUTPUT_DQ_OUTPUT_DDIO_OUT:datainh
i port.
output_dq_output_data_
in_low[n
o
-1..0]
Input Optional GND This port feeds the full-rate DDR output DQ signal
(falling edge) for the
OUTPUT_DQ_OUTPUT_DDIO_OUT:datainl
o port.
output_dq_output_data_
in[n
o
-1..0]
Input Optional GND This port feeds the output DQ signal for the
OUTPUT_DQ_OUTPUT_FF:d ,
OUTPUT_DQ_OUTPUT_DELAY_CHAIN1:dat
ain ,
OUTPUT_DQ_OUTPUT_DELAY_CHAIN2:dat
ain , or output_dq_output_data_out
port.
output_dq_output_data_
out[n
o
-1..0]
Output Optional — This port outputs the output DQ signal from the
OUTPUT_DQ_OUTPUT_DELAY_CHAIN2:dat
aout,
OUTPUT_DQ_OUTPUT_DELAY_CHAIN1:dat
aout , OUTPUT_DQ_OUTPUT_FF:q ,
OUTPUT_DQ_OUTPUT_DDIO_OUT:dataout ,
or output_dq_output_data_in port.
output_dq_sreset
[n
o
-1..0]
Input Optional GND This port is connected to all sreset ports in the
output DQ IO primitives that is used to
synchronously reset the registers in those
primitives.
Table 4–16. Megafunction Ports to Configure DQ Output Path (Part 2 of 2)
Port Name Type
Optional/
Required Default Description