Altera 50G Interlaken MegaCore Function - Manual (Page 24)

50G Interlaken IP Core Parameter Settings
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You customize the 50G Interlaken IP core by specifying parameters in the 50G Interlaken parameter
editor, which you access from the Quartus II IP Catalog.
This chapter describes the parameters and how they affect the behavior of the IP core. To customize your
50G Interlaken IP core, you can modify parameters to specify the following properties:
Meta Frame Length in Words on page 3-1
Transceiver Reference Clock Frequency on page 3-1
Number of Calendar Pages on page 3-2
TX Scrambler Seed on page 3-2
Transfer Mode Selection on page 3-2
Meta Frame Length in Words
The Meta frame length in words parameter specifies the length of the meta frame, in 64-bit (8-byte)
words. In the Interlaken specification, this parameter is called the MetaFrameLength parameter.
Smaller values for this parameter shorten the time to achieve lock. Larger values reduce overhead while
transferring data, after lock is achieved.
For simulation, you can set the Meta frame length in words parameter to the value of 128 for fast lane
locking. For hardware testing, Altera recommends that you set the Meta frame length in words
parameter to the value of 2048.
The default value of the Meta frame length in words parameter is 2048.
Transceiver Reference Clock Frequency
The Transceiver reference clock frequency parameter specifies the expected frequency of the
pll_ref_clk
input clock.
If the actual frequency of the
pll_ref_clk
input clock does not match the value you specify for this
parameter, the design fails in both simulation and hardware.
The 50G Interlaken IP core supports the following
pll_ref_clk
frequencies: 156.25 MHz, 195.3125
MHz, 250 MHz, 312.5 MHz, 390.625 MHz, 500 MHz, and 625 MHz.
The default value of the Transceiver reference clock frequency parameter is 312.5 MHz.
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